`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www.uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`
`
`
`CONFIRMATIONNO.
`
`
`12/139,577
`
`06/16/2008
`
`Naruhiko KASAI
`
`1497.48860X00
`
`1794
`
`20457
`
`7590
`
`05/27/2014
`
`ANTONELLI, TERRY, STOUT & KRAUS, LLP
`1300 NORTH SEVENTEENTH STREET
`SUITE 1800
`ARLINGTON,VA 22209-3873
`
`NGUYEN,JIMMYH
`
`2696
`
`MAIL DATE
`
`05/27/2014
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Status
`1)X] Responsive to communication(s)filed on 4/14/14.
`LJ A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiledon__
`2a)X] This action is FINAL.
`2b)L] This action is non-final.
`3)L] Anelection was made bythe applicant in responsetoarestriction requirementset forth during the interview on
`
`___} the restriction requirement and election have been incorporated into this action.
`4)[] Since this application is in condition for allowance exceptfor formal matters, prosecution as to the merits is
`closed in accordance with the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`5)KX] Claim(s) 1-27 is/are pending in the application.
`5a) Of the above claim(s) 6-70 is/are withdrawn from consideration.
`
`6)L] Claim(s)
`is/are allowed.
`7)X] Claim(s) 1-5 and 14-21 is/are rejected.
`8)L] Claim(s)____is/are objectedto.
`
`9)L] Claim(s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`
`nite://www.usoto.gov/patenis/init events/pph/index.isp
`
`or send an inquiry to PPHieedback@uspto.qov.
`
`Application Papers
`10)L] The specification is objected to by the Examiner.
`
`11)L] The drawing(s)filed on
`is/are: a)L_] accepted or b)[_] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)X] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`a)X] All
`)[_] Some** c)] None ofthe:
`1.x] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`““ See the attached detailed Office action for a list of the certified copies not received.
`
`
`
`Applicant(s)
`Application No.
` 12/139,577 KASAI ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventorto File)
`Office Action Summary
`
`2696JIMMY H. NGUYEN Na
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a).
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Anyreply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`In no event, however, may a reply betimely filed
`
`Attachment(s)
`3) CT] Interview Summary (PTO-413)
`1) CT] Notice of References Cited (PTO-892)
`Paper No(s)/Mail Date.
`:
`.
`4) Ol Other:
`2) CT] Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20140521
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 2
`
`1,
`
`The present application is being examined underthe pre-AIAfirst to invent provisions.
`
`DETAILED ACTION
`
`2.
`
`This Office Action is made in response to applicant’s amendmentfiled on 04/14/2014.
`
`Claims 1-21 are pending in the instant application. Claims 6-10 are withdrawn from further
`
`consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species II, there being
`
`no allowable generic or linking claim. Claims 1-5 and 11-21 are considered as follows:
`
`Response to Arguments
`
`3.
`
`Applicant's arguments filed 04/14/2014 with respect to the previous Office Action dated
`
`12/13/2013 have been fully considered but they are not fully persuasive as follows:
`
`With respect to the drawing objections and the rejections under 35 USC 112, first and
`
`second paragraphs, these objections and rejections are hereby withdrawnin light of the
`
`amendmentsto claims.
`
`With respect to the rejections under 35 USC 102(b) and 103(a), Applicant has argued that
`
`noneofthe cited references teach or suggest “providing a light-emitting-use voltage generation
`
`circuit which is separate from the detection use powersource for carrying out the separate
`
`operations defined in the independent claims 1, 11 and 14’. See page 12 of the amendment.
`
`Examiner disagrees because, as discussed in the previous Office Action and below, Satoh's the
`
`light-emitting-use voltage generation circuit (B1, 4 shownin Fig. 1; B3 shownin Fig. 7) is
`
`provided separately from the detection use power source or the detection-use current source (5 of
`
`Fig. 1; B2 of Fig. 7; { [0029]) and Sato's the light emitting-use power source (a voltage boost
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 3
`
`circuit for generating a drive voltage VH; { [0021]) is provided separately from the detection-use
`
`powersource(the “claimed” detection-use power source can be considerably correspondto an
`
`operation power source VDD or a powersource comprising elements J1/J2/...; see Figs. 1-2 and
`
`{ [0027]; or a reverse bias voltage VM; see Fig. 1; 4 0035]).
`
`Notice to Applicant(s)
`
`4.
`
`Further, note that in order to avoid confusion, the below citations in the below
`
`rejection(s) are mere one or moreplacesin the reference to disclose the "claimed" limitation(s)
`
`and/or are directed to one or more of embodiments disclosed by the cited reference(s). In other
`
`words,the “claimed” features/limitations may be read in other places in the reference or other
`
`embodiments of the reference. In order to better understand how the claimed limitations are
`
`taught by the reference(s), a review of the entire reference(s) is suggested by the examiner.
`
`Claim Rejections - 35 USC § 102
`
`5.
`
`The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that
`
`form the basis for the rejections under this section madein this Office action:
`
`A personshall be entitled to a patent unless —
`
`(b) the invention was patented or described in a printed publication in this or a foreign country or in public use or
`on sale in this country, more than one year prior to the date of application for patent in the United States.
`
`6.
`
`Claims 1-3, 11, 12 and 14-21 are rejected under pre-AIA 35 U.S.C. 102(b) as being
`
`anticipated by Satoh et al. (US 2005/0110719 A1), hereinafter Satoh.
`
`Asto claim 1, Satoh discloses an image display device (see Fig. 1, 7), capable of
`
`detecting a defect of a pixel, comprising:
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 4
`
`a display panel (1) comprising a plurality of pixels, each comprising a self-light emitting
`
`element (Fig. 1, 7);
`
`a data line drive circuit (2) which drives the pixels based on a data signal (video signal;
`
`Fig. 1, 7);
`
`a control circuit (11, 14; Fig. 1, 7) which controls the data signal (Fig. 1, 7);
`
`a detection line for transmitting a characteristic of at least one pixels which indicates
`
`presence of a defect in said at least one of said pixels (a line connected between the cathode line
`
`K and the corresponding switch Sk or a left end portion of the cathode line K from thefirst left
`
`E11/E12/E13 to a terminal of switch Sk, so as to allow the current passing through each EL
`
`during a methodofverifying a defect state of a pixel; see Fig. 1; { [0032]-[0034]; also see Fig. 7,
`
`detection line F1/F2/...);
`
`a light-emitting-use voltage generation circuit (B1, 4 shownin Fig. 1; B3 shownin Fig.
`
`7) which generates a powersource voltage (VH shownin Fig. 1; B3 shownin Fig. 7) for
`
`supplying electric current which enablesthe self-light-emitting elements in the pixels to emit
`
`light (| [0024]; { [0077]);
`
`a defect position determination circuit (elements 5, lla, Llc, 12, 13; see Fig. 1, 3; J
`
`[0032], lines 9-18; or elements 11-13, 21, 22; Fig. 7) which determinesa defect position of said
`
`one of said pixels based on an output signal from the detection line ({| [0032]; [0078]-[0080]);
`
`and
`
`a defect position storing circuit (11b; Fig. 3) which stores the defect position from the
`
`defect position determination circuit and transmits the defect position to the control circuit (see
`
`Fig. 4; steps $14, S15, S20, S21; { [0055]; { [0080]), wherein
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 5
`
`the defect position determination circuit (5, lla, llc, 12, 13; Figs. 1, 3; 11-13, 21, 22;
`
`Fig. 7) includes a detection-use current source (5 of Fig. 1; B2 of Fig. 7; { [0029] disclosing the
`
`circuit 5 generating a reverse bias voltage VM; andlines 10-11 of Abstract disclosing the circuit
`
`for generating the reverse bias voltage is used as a current source; also see [0079]) separate from
`
`the light-emitting-use voltage generation circuit (B1, 4 shown in Fig. 1; B3 shownin Fig. 7), a
`
`detection outputline (a line connecting the output of the transistor Q2 to a terminal (+) of the
`
`amplifier 12a; see Figs. 1-2), a detection line switch (Sk1/Sk2/...; Fig. 1) and a defect position
`
`information generation circuit (1la, llc, 12, 13; Figs. 2-3),
`
`the detection-use current source (5 of Fig. 1; B2 of Fig. 7) is connected to the detection
`
`line via the detection output line and the detection line switch (see the above discussion; Figs. 1-
`
`2; also see Fig. 7; { [0079]), and is configured to supply electric current which enables the defect
`
`position determination circuit to provide an output signal indicating the defect position on said
`
`detection outputline (¥ [0033], [0034], [0079], [0080)),
`
`the detection output line is connected to an input terminal of the defect position
`
`information generation circuit (see the above discussion; Figs. 1-3; Fig. 7), and
`
`an output terminal of the defect position information generation circuit (1la, llc, 12, 13),
`
`is connected to the defect position storing circuit (11b) (Fig. 3 disclosing an output terminal, of
`
`element 11a of the defect position information generation circuit, connected to the defect
`
`position storing circuit 11b; also see Fig. 7.)
`
`Accordingly, all limitations of this claim are read in the Satoh reference.
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 6
`
`Asto claim 2, Satoh discloses the detection-use current source (5) and the detection line
`
`being connected with each other during a period different from a display period within which the
`
`detection line switch outputs the data signal, wherein the output signal indicating the defect
`
`position is providedto said detection output line during said period ({ [0032]-[0034] disclosing
`
`the detection-use current source (5) and the detection line being connected with each other
`
`during a defect pixel detection period, which is different from a display period within which the
`
`detection line switch outputs the data signal; also see Fig. 7.)
`
`Asto claim 3, Satoh discloses the defect position determination circuit (4, 5, lla, 11c,
`
`12, 13) determining the presence or the non-presence of the defects (Fig. 3; {| [0044] and the
`
`defect position storing circuit (11b) storing the presence or the non-presenceof the defects for
`
`one screen (see steps $14, S15, $20, S21; {| [0055]; also see Fig. 7).
`
`Asto claims 11 and 18, Satoh discloses an image display device (see Fig. 1, 7), capable
`
`of detecting a defect of a pixel, comprising:
`
`a display panel (1) comprising a plurality of pixels, each comprising an OLED (EL
`
`element; Fig. 1, 7);
`
`a data line drive circuit (2) which drives the pixels based on a data signal (video signal;
`
`Fig. 1, 7);
`
`a scanning line drive circuit (3; Fig. 1, 7) which scansthe pixels ({| [0030], {| [0070]);
`
`a changeovercircuit (Sal-San and skl-skm shownin Fig. 1; Syl-Syn and Sx1-Sxm
`
`shownin Fig. 7) which changes over the connection of the pixels with the data line drive circuit
`
`(2) or the connection of the pixels with a detection-use power source as a detection-use current
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 7
`
`source (5, 12 of Fig. 1 or B2, 12 of Fig. 7; { [0029] disclosing the circuit 5 generating a reverse
`
`bias voltage VM; and lines 10-11 of Abstract disclosing the circuit for generating the reverse
`
`bias voltage is used as a current source; also see [0079]) separate from the light-emitting-use
`
`voltage generation circuit (B1, 4 shownin Fig. 1; B3 shownin Fig. 7) provided separately from a
`
`light emitting-use powersource (B1, 4 of Fig. 1; or B3 of Fig. 7) which generates an electric
`
`current which enables to pixel to emit light (4 [0024]; { [0077]), and
`
`a detection circuit (elements 5, lla, llc, 12, 13; see Fig. 1, 3; { [0032], lines 9-18; or
`
`elements 11-13, 21, 22; Fig. 7) which, when the pixels are connected with the detection-use
`
`powersource (5, 12 of Fig. | or B2, 12 of Fig. 7) provided separately from the light emitting-use
`
`powersource (B1, 4 of Fig. 1; or B3 of Fig. 7), detects at least one of the pixels whose voltage at
`
`an anode of an OLEDofthe pixel is equal to or less than a threshold value ({ [0046], {{ [0080]).
`
`Accordingly, all limitations of this claim are read in the Satoh reference.
`
`Asto claim 12, Satoh discloses that the changeovercircuit, during a period other than
`
`both of a period of supplying the data signal to the pixel and a light emission period of the pixel
`
`within 1 frame period, connects the pixel to the detection-use power source provided separately
`
`from the light emitting power source ({[ [0042]-[0044]; or { [0078]-[0080]).
`
`Asto claims 14 and 19, Satoh discloses an image display device (see Fig. 1, 7), capable
`
`of detecting a defect of a pixel, comprising:
`
`a display panel (1) comprising a plurality of pixels, each comprising a self-light emitting
`
`element(Fig. 1, 7);
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 8
`
`a data line drive circuit (2) which drives the pixels based on a data signal (video signal;
`
`Fig. 1, 7);
`
`a scanning line drive circuit (3; Fig. 1, 7) which scansthe pixels ({| [0030], {| [0070]);
`
`a changeovercircuit (Sal-San and skl-skm shownin Fig. 1; Syl-Syn and Sx1-Sxm
`
`shownin Fig. 7) which changesover the supply of a data signal to the pixels or the supply from a
`
`detection-use power source as a detection-use current source (5, 12 of Fig. 1 or B2, 12 of Fig. 7;
`
`{ [0029] disclosing the circuit 5 generating a reverse bias voltage VM; andlines 10-11 of
`
`Abstract disclosing the circuit for generating the reverse bias voltage is used as a current source;
`
`also see [0079]) provided separately from a light emitting-use power source (B1, 4 of Fig. 1; or
`
`B3 of Fig. 7) which generates an electric current which enablesto pixel to emit light ( [0024]; {
`
`[0077]), and
`
`a detection circuit (elements 5, lla, llc, 12, 13; see Fig. 1, 3; { [0032], lines 9-18; or
`
`elements 11-13, 21, 22; Fig. 7) which, whenelectricity is supplied to the pixels from the
`
`detection-use powersource (5, 12 of Fig. 1 or B2, 12 of Fig. 7) provided separately from the
`
`light emitting-use power source (B1, 4 of Fig. 1; or B3 of Fig. 7), detects at least one of the
`
`pixels whose voltage at an anode of the OLEDofthe at least one pixel is equal to or less than a
`
`threshold value ({ [0046], 4 [0080]).
`
`Accordingly, all limitations of this claim are read in the Satoh reference.
`
`Asto claims 15-17, Satoh discloses the light-emitting-use voltage generation circuit (B1,
`
`4 of Fig. 1; or B3 of Fig. 7) comprises a constant voltage source (B1 of Fig. 1; or B3 of Fig. 7)
`
`Asto claims 20-21, see the discussion in the rejection to claim 18 or 19 above.
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 9
`
`7.
`
`Claims 11, 12, 14 and 16-21 are rejected under pre-AIA 35 U.S.C. 102(b) as being
`
`anticipated by Sato et al. (US 2005/0212730 A1), hereinafter Sato.
`
`Asto claim 11, Sato discloses an image display device (Figs. 1-2) comprising:
`
`a display panel (1; Fig. 1) comprising a plurality of pixels ({ [0020], lines 1-2) each
`
`including an OLED (ELelement; Fig. 1);
`
`a data line drive circuit (2; Fig. 1) which drives the pixels based on a data signal (a video
`
`signal; Fig. 1; { [0023], [0024]);
`
`a scanning line drive circuit (3; Fig. 1) which scansthe pixels ({{ [0022]);
`
`a changeovercircuit (Sal-San, Sk1-Skm; Fig. 1) which changes over the connection of
`
`the pixels with the data line drive circuit (2) or the connection of the pixels with a detection-use
`
`powersource(the “claimed” detection-use power source can be considerably correspondto an
`
`operation power source VDD or a powersource comprising elements J1/J2/...; see Figs. 1-2 and
`
`{ [0027]; or a reverse bias voltage VM; see Fig. 1; | 0035]) provided separately from a light
`
`emitting-use powersource (a voltage boostcircuit for generating a drive voltage VH; {{ [0021])
`
`which generates an electric current which enables to pixel to emit light ({ [0021]-[0022]), and
`
`a detection circuit (J1-Jn, LC1-LCn, 11-13; Figs. 2-3) which, when the pixels are
`
`connected with the detection-use power source (VDD/J/VM)provided separately from the light
`
`emitting-use powersource (the voltage boost circuit for generating a drive voltage VH; see the
`
`above discussion), detects at least one of the pixels whose voltage at an anode of the OLED of
`
`the pixel is equal to or less than a threshold value (Fig. 2; {| [0038]-[0039], disclosing if the
`
`electrical potential at the anode supplied to the gate of the transistor is greater than the threshold
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 10
`
`voltage of the transistor Q31, the pixel is defect, andif the electrical potential at the anode
`
`supplied to the gate of the transistor is equal or less than the threshold voltage of the transistor
`
`Q31, the pixel is normal).
`
`Asto claim 12, Sato discloses that the changeovercircuit, during a period other than both
`
`of a period of supplying the data signal to the pixel and a light emission period of the pixel
`
`within 1 frame period, connects the pixel to the detection-use power source provided separately
`
`from the light emitting power source ({[ [0033]-[0034]).
`
`Asto claim 14, Sato discloses an image display device (Figs. 1-2) comprising:
`
`a display panel (1; Fig. 1) which is constituted of a plurality of pixels ({ [0020], lines 1-2)
`
`each including an OLED (EL element; Fig. 1);
`
`a data line drive circuit (2; Fig. 1) which drives the pixels based on a data signal (a video
`
`signal; Fig. 1; { [0023], [0024]);
`
`a scanning line drive circuit (3; Fig. 1) which scansthe pixels ({{ [0022]);
`
`a changeovercircuit (Sal-San, Sk1-Skm; Fig. 1) which changes overthe supply of a data
`
`signal to the pixels or the supply of electricity from a detection-use power source (the “claimed”
`
`detection-use power source can be considerably correspond to an operation power source VDD
`
`or a power source comprising elements J1/J2/...; see Figs. 1-2 and § [0027]; or a reverse bias
`
`voltage VM; see Fig. 1; 4 0035]), provided separately a light emitting power source (a voltage
`
`boost circuit for generating a drive voltage VH; { [0021]) which generates an electric current
`
`which enablesto pixel to emit light ({ [0021]-[0022]), and
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 11
`
`a detection circuit (J1-Jn, LC1-LCn, 11-13; Figs. 2-3) which, when electricity is supplied
`
`to the pixels from the detection-use power source (VDD/J/VM)provided separately from the
`
`light emitting power source (the voltage boost circuit for generating a drive voltage VH; see the
`
`above discussion), detects at least one of the pixels whose voltage at an anode of the OLED of
`
`the at least one pixel is equal to or less than a threshold value (Fig. 2; { [0038]-[0039], disclosing
`
`if the electrical potential at the anode supplied to the gate of the transistor is greater than the
`
`threshold voltage of the transistor Q31, the pixel is defect, and if the electrical potential at the
`
`anode supplied to the gate of the transistor is equal or less than the threshold voltage of the
`
`transistor Q31, the pixel is normal).
`
`Asto claims 16 and 17, Sato discloses said light-emitting-use power source (the voltage
`
`boost circuit for generating a drive voltage VH; see the above discussion) comprises a constant
`
`voltage source (the voltage boost circuit for generating a drive voltage VH; see the above
`
`discussion).
`
`Asto claims 18-21, Sato discloses the detection-use power source (the “claimed”
`
`detection-use power source can be considerably correspond to an operation power source VDD
`
`or a power source comprising elements J1/J2/...; see Figs. 1-2 and § [0027]; or a reverse bias
`
`voltage VM; see Fig. 1; § 0035]) comprising a detection-use current source (VDD/J/VM).
`
`Claim Rejections - 35 USC § 103
`
`8.
`
`The following is a quotation of pre-AIA 35 U.S.C. 103(a) which formsthe basis forall
`
`obviousnessrejections set forth in this Office action:
`
`(a) A patent may not be obtained thoughthe inventionis not identically disclosed or described as set forth in
`section 102 ofthistitle, if the differences between the subject matter sought to be patented andthe prior art are
`such that the subject matter as a whole would have been obviousat the time the invention was made to a person
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 12
`
`having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the
`manner in which the invention was made.
`
`9.
`
`Claims 4 and 13 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over
`
`Satoh, and further in view of Tanaseet al. (US 2006/0268003 A1; hereinafter Tanase).
`
`Asto claim 4, as discussed in the rejection of claim | above, Satoh discloses all
`
`limitations of this claim; however, Satohis silent to the control circuit configured to correct data
`
`signals of pixels aroundsaid one of said pixels which has the defect and to make the defective
`
`pixel inconspicuousvisually, as defined in this claim.
`
`However, Tanase discloses a related EL display device comprising a control circuit (1, 2;
`
`Fig. 1) configured to correct data signals of pixels around said one of said pixels which has the
`
`defect and to make the defective pixel inconspicuousvisually (Abstract; { [[0011], [0012],
`
`[0014]). Therefore, it would have been obviousto a person of ordinary skill in the art at the time
`
`of the invention was made to modify the control circuit of Satoh, in view of the aforementioned
`
`teaching in the Tanase reference, because this would make no black spot appearing and the
`
`defect being comparatively inconspicuous, as taught by the Tanase reference (see {| [0014]).
`
`Asto claim 13, as discussed in the rejection of claim 11 above, Satoh disclosesall
`
`limitations of this claim; however, Satoh does not disclose a correction circuit which corrects a
`
`data signal outputted to the pixel positioned aroundtheat least one of the pixels whose voltage is
`
`equal to or less than a threshold value or to the pixel positioned around the defective pixel.
`
`However, Tanase discloses a related EL display device comprising a correction circuit (1,
`
`2; Fig. 1) correcting data signals of pixels around a defective pixel and making the defective
`
`pixel inconspicuousvisually (Abstract; { [[0011], [0012], [0014]). Therefore, it would have been
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 13
`
`obvious to a person of ordinary skill in the art at the time of the invention was madeto provide a
`
`correction circuit in the display device of Satoh, in view of the teaching in the Tanase reference,
`
`because this would make no black spot appearing and the defect being comparatively
`
`inconspicuous, as taught by the Tanase reference (see { [0014]).
`
`10.
`
`Claim 5 is rejected under 35 U.S.C. 103(a) as being unpatentable over Satoh, and further
`
`in view of Goto et al. (US 2005/0200582 A1; hereinafter Goto).
`
`Asto claim 5, as discussed in the rejection of claim 1 above, Satoh disclosesall
`
`limitations of this claim; however, Satoh is silent to selection switches which supply signals of
`
`R(red), G(green), B(blue) by time division to the pixels as the data signals, as defined in this
`
`claim.
`
`However, Goto discloses a related EL display device (Fig. 1; {| [0028]) comprising
`
`selection switches (SW1, SW2, SW3,...; Fig. 1) which supply signals of R(red), G(green),
`
`B(blue) by time division to the pixels as the data signals ({{ [0037]). It would have been obvious
`
`to a person of ordinary skill in the art at the time of the invention was madeto provide selection
`
`switchesin the display device of Satoh, in view of the teaching in the Goto reference, because
`
`this would reduce the numberof output terminals of the drain/data driver, as taught by the Goto
`
`reference (see J [0004], lines 1-7).
`
`11.
`
`Claim 13 is rejected under 35 U.S.C. 103(a) as being unpatentable over Sato, and further
`
`in view of Tanase et al. (US 2006/0268003 A1; hereinafter Tanase).
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 14
`
`Asto claim 13, as discussed in the rejection of claim 11 above, Sato discloses all
`
`limitations of this claim; however, Sato does not disclose a correction circuit which corrects a
`
`data signal outputted to the pixel positioned aroundtheat least one of the pixels whose voltage is
`
`equal to or less than a threshold value or to the pixel positioned around the defective pixel.
`
`However, Tanase discloses a related EL display device comprising a correction circuit (1, 2; Fig.
`
`1) correcting data signals of pixels around a defective pixel and making the defective pixel
`
`inconspicuousvisually (Abstract; { [[0011], [0012], [0014]). Therefore, it would have been
`
`obvious to a person of ordinary skill in the art at the time of the invention was madeto provide a
`
`correction circuit in the display device of Sato, in view of the teaching in the Tanase reference,
`
`because this would make no black spot appearing and the defect being comparatively
`
`inconspicuous, as taught by the Tanase reference (see { [0014]).
`
`Conclusion
`
`12.
`
`THIS ACTION IS MADEFINAL. Applicant is reminded of the extension of time
`
`policy as set forth in 37 CFR 1.136(a).
`
`A shortenedstatutory period for reply to this final action is set to expire THREE
`
`MONTHSfrom the mailing date of this action. In the eventafirst reply is filed within TWO
`
`MONTHSof the mailing date of this final action and the advisory action is not mailed until after
`
`the end of the THREE-MONTHshortened statutory period, then the shortened statutory period
`
`will expire on the date the advisory action is mailed, and any extension fee pursuant to 37
`
`CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event,
`
`

`

`Application/Control Number: 12/139,577
`
`Art Unit: 2696
`
`Page 15
`
`however, will the statutory period for reply expire later than SIX MONTHSfrom the mailing
`
`date of this final action.
`
`13.
`
`Anyinquiry concerning this communication or earlier communications from the
`
`examiner should be directed to JIMMY H. NGUYENwhosetelephone numberis (571)272-
`
`7675. The examiner can normally be reached on Monday- Friday, 7:30 a.m. - 4:00 p.m..
`
`If attempts to reach the examinerby telephone are unsuccessful, the examiner's
`
`supervisor, Amare Mengistu can be reached at 571-272-7674. The fax phone numberfor the
`
`organization where this application or proceeding is assigned is (571) 273-8300.
`
`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published applications
`
`maybe obtained from either Private PAIR or Public PAIR. Status information for unpublished
`
`applications is available through Private PAIR only. For more information about the PAIR
`
`system, see hitp://pair-direct.uspto.goy. Should you have questions on access to the Private PAIR
`
`
`system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
`
`/Jimmy H Nguyen/
`
`Primary Examiner, Art Unit 2696
`
`