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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www.uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`
`
`
`CONFIRMATIONNO.
`
`
`12/477,155
`
`06/03/2009
`
`Tohru Kohno
`
`1497.49957X00
`
`6846
`
`20457
`
`7590
`
`07/22/2014
`
`ANTONELLI, TERRY, STOUT & KRAUS, LLP
`1300 NORTH SEVENTEENTH STREET
`SUITE 1800
`ARLINGTON,VA 22209-3873
`
`SHAPIRO, LEONID
`
`2625
`
`MAIL DATE
`
`07/22/2014
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`Application No.
`Applicant(s)
`
` 12/477,155 KOHNO ETAL.
`Office Action Summary
`Examiner
`Art Unit
`AIA (First Inventor toFile)
`
`
`2699LEONID SHAPIRO No
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address--
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTH(S) OR THIRTY(30) DAYS,
`WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR 1.136(a).
`In no event, however, may a reply be timely filed
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`-
`-
`
`Status
`1) Responsive to communication(s) filed on22February2013.
`L] A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filedon___
`2a)L] This action is FINAL.
`2b)X] This action is non-final.
`3)L] An election was made bythe applicant in responseto a restriction requirementset forth during the interview on
`
`; the restriction requirement and election have been incorporated into this action.
`4)L] Sincethis application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordancewith the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`
`
`Disposition of Claims
`5) Claim(s) 1-72 is/are pending in the application.
`
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`6)K] Claim(s) 5-12 is/are allowed.
`7)K] Claim(s) 1-4 is/are rejected.
`8)L] Claim(s)___ is/are objectedto.
`
`9)L] Claim(s)
`are subjectto restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`
`nite://www.usoto.dov/patenis/init events/oph/index.isp
`
`or send an inquiry to PPHieedback@uspte.dov.
`
`Application Papers
`10) The specification is objected to by the Examiner.
`
`11) The drawing(s) filed on
`is/are: a)[_] accepted or b)[_] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`12) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`a)X] All
`b)L] Some* c)L] None ofthe:
`1.X] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`“ See the attached detailed Office action for a list of the certified copies not received.
`Interim copies:
`a)LI All
`b)LJ Some
`
`Interim copies of the priority documents have been received.
`
`c)L) None of the:
`
`Attachment(s)
`3) TC Interview Summary (PTO-413)
`1) X Notice of References Cited (PTO-892)
`Paper No(s)/Mail Date.
`;
`;
`oO Other
`2) CT] Information Disclosure Statement(s) (PTO/SB/08)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`PTOL-326 (Rev. 03-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20130605
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`Page 2
`
`Claim Rejections - 35 USC § 103
`
`The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all
`
`obviousnessrejections setforth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described as set
`forth in section 102 of thistitle, if the differences between the subject matter sought to be patented and
`the prior art are such that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said subject matter pertains.
`Patentability shall not be negatived by the manner in which the invention was made.
`
`1.
`
`Claims 1-2 are rejected under 35 U.S.C. 103(a) as being unpatentable over
`
`Routley et al. (2009/0201281 A1) in view of Stevenson et al. (2004/0183759 A1).
`
`Asto claim 1, Routley et al. teaches an image display device (PAR. 0001),
`
`comprising:
`
`a plurality of pixels each including a self-light-emitting element and a driver
`
`transistor for driving the self-light-emitting element(fig. 1, items 152,158), the driver
`
`transistor being driven in a saturation region (fig. 2a, items 202-208, pars. 0011,0018);
`
`a plurality of signal lines through which an image voltage is inputto the plurality
`
`of pixels (fig. 3, items 320,344);
`
`voltage detection means for detecting a voltage across the self-light-emitting
`
`elementof eachof the plurality of pixels, which is observed when a constant currentis
`
`supplied from a constant current supplying circuit (fig. 3, item 340, pars. 0041-0042) to
`
`the self-light-emitting element of the each of the plurality of pixels (figs. 3-4, items
`
`312,S400, par. 0048 andfig. 3, item 340, pars. 0041-0042); and
`
`means for controlling one of a reference voltage and a powersupply voltage
`
`whenthe voltage detected by the voltage detection means exceedsa threshold voltage
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`Page 3
`
`in order to keep an operation region of the driver transistor to the saturation region in
`
`every one ofthe plurality of pixels (fig. 4, items S402-S406, pars. 0015-0018, 0022,
`
`0049).
`
`Routley et al. do not disclose connecting respective self-light-emitting elements
`
`of the plurality of pixels to the constant current supplying circuit sequentially.
`
`Stevenson et al. teach connecting respective self-light-emitting elements of the
`
`plurality of pixels to the constant current supplying circuit sequentially (par. 0115).
`
`It would have been obvious to oneof ordinary skill in the art at the time of the
`
`invention to incorporate teachings of Stevenson etal. into Routley et al. system in order
`
`to improve homogeneity (Title of Stevenson etal. reference).
`
`As to claim 2, Routley et al. teaches OLED (par. 0002).
`
`2.
`
`Claim 3 is rejected under 35 U.S.C. 103(a) as being unpatentable over Routley
`
`et al., Stevenson etal. in view of Jo (6,806,497 B2).
`
`Routley et al., Stevenson et al. do not disclose a plurality of selection control
`
`lines; a plurality of lighting switch lines; and a plurality of detection control lines, wherein
`
`the eachof the plurality of pixels includes: a selector switch transistor whichis
`
`connected betweena gate electrode of the driver transistor and a secondelectrodeof
`
`the driver transistor; a capacitor element which is connected between the gate electrode
`
`of the driver transistor and one of the plurality of signal lines that is associated with that
`
`capacitor element; a lighting transistor which is connected between the second
`
`electrode of the driver transistor and oneof electrodesof the self-light-emitting element;
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`Page 4
`
`and a detection transistor which is connected between the one ofthe electrodes of the
`
`self-light-emitting element and oneofthe plurality of signal lines that is associated with
`
`that detection transistor, wherein the selector switch transistor has a gate electrode
`
`connected to one ofthe plurality of selection control lines that is associated with that
`
`selector switch transistor; the lighting transistor has a gate electrode connected to one
`
`of the plurality of lighting switch lines that is associated with that lighting transistor; and
`
`the detection transistor has a gate electrode connectedto one ofthe plurality of
`
`detection control lines that is associated with that detection transistor.
`
`Jo teaches a plurality of selection control lines (fig. 3, item SL1); a plurality of
`
`lighting switchlines (fig. 3, item SL2); and a plurality of detection control lines (fig. 3,G1-
`
`G2), wherein the eachofthe plurality of pixels includes: a selector switch transistor
`
`which is connected between a gate electrode of the driver transistor and a second
`
`electrode of the drivertransistor (fig. 3, items Q11-Q12); a capacitor element which is
`
`connected betweenthe gate electrode of the driver transistor and one ofthe plurality of
`
`signal lines that is associated with that capacitor element(fig. 3, item C1); a lighting
`
`transistor which is connected between the second electrode of the driver transistor and
`
`one of electrodes of the self-light-emitting element(fig. 3, items Q11,Q13,21); anda
`
`detection transistor which is connected between the one of the electrodesof the self-
`
`light-emitting element and one of the plurality of signal lines that is associated with that
`
`detection transistor(fig. 3, items Q2,Q13-Q14,21,Xm), wherein the selector switch
`
`transistor has a gate electrode connectedto one of the plurality of selection control lines
`
`that is associated with that selector switch transistor (fig. 3, items SL1,Q12); the lighting
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`Page 5
`
`transistor has a gate electrode connectedto one ofthe plurality of lighting switch lines
`
`that is associated with thatlighting transistor (fig. 3, items SL2,Q13-Q14); and the
`
`detection transistor has a gate electrode connected to one ofthe plurality of detection
`
`control lines that is associated with that detection transistor (fig. 3, items Q2,G2, from
`
`col. 4, line 31 to col. 6, line 43).
`
`It would have been obvious to oneof ordinary skill in the art at the time of the
`
`invention to incorporate teachings of Jo into Routley et al., Stevenson et al. system in
`
`order to adjust the operation of the driven element(col. 3, lines 63-67 of the Jo
`
`reference).
`
`4.
`
`Claim 4 is rejected under 35 U.S.C. 103(a) as being unpatentable over Routley
`
`et al., Jo, Stevensonetal. in view of Akimoto et al. (2005/0110720 A1).
`
`Routley et al., Jo, Stevenson et al.do not disclose a plurality of reset lines, a
`
`reset switch transistor, a second capacitor.
`
`Akimoto et al. teachesa plurality of reset lines, a reset switch transistor, a second
`
`capacitor (fig. 6, items 50,51,53, par. 0055).
`
`It would have been obvious to oneof ordinary skill in the art at the time of the
`
`invention to incorporate teachings of Akimoto et al. into Routley et al., Jo, Stevenson et
`
`al. system in order to cancel a variation in the characteristic (par. 0011 in the Akimoto et
`
`al. reference).
`
`Allowable Subject Matter
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`5.
`
`Claims 5-12 are allowed.
`
`Page 6
`
`Relative to claim 5 the major difference between the teaching of the prior art of
`
`record (Routley et al., Stevenson et al.) and the instant invention is that a first
`
`calculation means for calculating a differential voltage between the reference voltage
`
`and the image voltage for the self-light-emitting element of the pixel that has been
`
`determined as a deteriorated self-light-emitting element by the voltage/characteristics
`
`detection means; a second calculation means for multiplying a result of calculation
`
`madebythefirst calculation means by a non-linearlight emission correction amount;
`
`and_a third calculation means for subtracting a result of calculation made by the
`
`second calculation means from the reference voltage to obtain a corrected image
`
`voltage.
`
`Claims 6-12 depend on claim 5.
`
`Responseto Arguments
`
`6.
`
`Applicant’s arguments with respect to claims 1-4 have been considered but are
`
`moot because the arguments do not apply to any of the references being used in the
`
`current rejection.
`
`Telephoneinquire
`
`Anyinquiry concerning this communication or earlier communications from the
`
`examiner should be directed to LEONID SHAPIRO whosetelephone numberis
`
`(571)272-7683. The examiner can normally be reached on 8 a.m. to 5p.m..
`
`

`

`Application/Control Number: 12/477,155
`Art Unit: 2699
`
`Page 7
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner's
`
`supervisor, Will Boddie can be reached on (571)-272-0666. The fax phone numberfor
`
`the organization wherethis application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published
`
`applications may be obtained from either Private PAIR or Public PAIR. Status
`
`information for unpublished applications is available through Private PAIR only. For
`
`more information about the PAIR system, see http://pair-direct.uspto.gov. Should you
`
`have questions on accessto the Private PAIR system, contact the Electronic Business
`
`Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO
`
`Customer Service Representative or access to the automated information system, call
`
`800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/L. S./
`Examiner, Art Unit 2629
`07/05/14
`
`/WILLIAM BODDIE/
`
`Supervisory Patent Examiner, Art Unit 2625
`
`

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