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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria1 Virginia 22313- 1450
`wwwnsptogov
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`APPLICATION NO.
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` F ING DATE
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`FIRST NAMED INVENTOR
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`ATTORNEY DOCKET NO.
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`CONF {MATION NO.
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`12/092, 102
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`04/3 0/2008
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`Hidehiko Shoji
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`MAT—10148US
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`8544
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`EXAMINER
`RATNERPRESTIA —
`02/25/2013 —
`7590
`52473
`PO. BOX 980
`PERVAN, MICHAEL
`VALLEY FORGE, PA 19482-0980
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`PAPER NUMBER
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`ART UNIT
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`2691
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`MAIL DATE
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`02/25/2013
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`DELIVERY MODE
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`PAPER
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`Please find below and/or attached an Office communication concerning this application or proceeding.
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`The time period for reply, if any, is set in the attached communication.
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`PTOL—90A (Rev. 04/07)
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`

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`Office Action Summary
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`Application No.
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`12/092,102
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`Examiner
`Michael Pervan
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`Applicant(s)
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`SHOJI ET AL.
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`Art Unit
`2691
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`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
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`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE 3 MONTH(S) OR THIRTY (30) DAYS,
`WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`In no event however may a reply be timely filed
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
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`Status
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`1)IZI Responsive to communication(s) filed on 13 February 2012.
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`2a)I:l This action is FINAL.
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`2b)IZ| This action is non-final.
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`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
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`; the restriction requirement and election have been incorporated into this action.
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`4)|:l Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
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`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
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`Disposition of Claims
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`5)IZI Claim(s) 1 and2is/are pending in the application.
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`5a) Of the above claim(s) _ is/are withdrawn from consideration.
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`6)I:I Claim(s) _ is/are allowed.
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`7)|Zl Claim(s) 1and2is/are rejected.
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`8)I:I Claim(s) _ is/are objected to.
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`9)I:l Claim((s)
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`are subject to restriction and/or election requirement.
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`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway
`program at a participating intellectual property office for the corresponding application. For more information, please see
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`htt
`:/'/www.us to. om’watents/Init eventS/bnh/Indest or send an inquiry to PPeredback usntqt 0v.
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`Application Papers
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`10)|:l The specification is objected to by the Examiner.
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`11)|Z| The drawing(s) filed on 30 AQI’i/ 2008 is/are: a)IZI accepted or b)|:l objected to by the Examiner.
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`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
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`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
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`Priority under 35 U.S.C. § 119
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`12)IZ| Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
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`a)lX| AII
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`b)I:I Some * c)|:l None of:
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`1.IZI Certified copies of the priority documents have been received.
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`2.I:I Certified copies of the priority documents have been received in Application No. _
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`3.|:I Copies of the certified copies of the priority documents have been received in this National Stage
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`application from the International Bureau (PCT Rule 17.2(a)).
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`* See the attached detailed Office action for a list of the certified copies not received.
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`Attachment(s)
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`1) I] Notice of References Cited (PTO-892)
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`2) I] Information Disclosure Statement(s) (PTO/SB/OS)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
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`3) D Interview Summary (PTO-413)
`Paper No(s)/Mai| Date.
`4) D Other:
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`PTOL-326 (Rev. 09-12)
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`Office Action Summary
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`Part of Paper No./Mai| Date 20130220
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`
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`

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`Application/Control Number: 12/092,102
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`Page 2
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`Art Unit: 2691
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`DETAILED ACTION
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`Response to Arguments
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`1.
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`Applicant's arguments filed February 13, 2012 have been fully considered but
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`they are not persuasive.
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`Applicant (on page 5 of argument) argues that Yoon does not disclose a sustain
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`period containing an erasing period. Examiner respectfully disagrees.
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`Yoon discloses a sustain period that has an erase pulse at the end of the sustain
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`period to erase wall charges left behind (Fig. 3 and col. 2, line 63-col. 3, line 7).
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`Therefore, Yoon still supports the Examiner's contention that it is well known in the art
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`that an erasing period can be considered part of the sustain period.
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`Applicant (on page 5 of argument) argues that Murakosa and Lee do not disclose
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`wherein the voltage for reducing the inter-electrode potential difference is also applied
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`to the display electrode pairs during an initializing period subsequent to the sustain
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`period. Examiner respectfully disagrees.
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`Lee discloses having an initialization period following sustain periods (Fig. 4).
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`Murakosa discloses a voltage (Ve) for reducing the inter-electrode potential difference
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`that starts in the sustain period, as supported by Yoon, and continues into the
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`subsequent addressing period. Lee discloses a voltage for reducing the inter-electrode
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`potential difference that starts in the initialization period and continues into the
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`subsequent address period. Together, Murakosa and Lee would disclose a voltage for
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`reducing the inter-electrode potential difference is also applied to the display electrode
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`Application/Control Number: 12/092,102
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`Page 3
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`Art Unit: 2691
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`pairs during an initializing period subsequent to the sustain period. As a result,
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`Murakosa and Lee still read on the claims and the rejection is maintained.
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`Claim Rejections - 35 USC § 103
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`2.
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`The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all
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`obviousness rejections set forth in this Office action:
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`(a) A patent may not be obtained though the invention is not identically disclosed or described as set
`forth in section 102 of this title, if the differences between the subject matter sought to be patented and
`the prior art are such that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said subject matter pertains.
`Patentability shall not be negatived by the manner in which the invention was made.
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`3.
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`Claims 1-2 are rejected under 35 U.S.C. 103(a) as being unpatentable over
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`Murakosa et al (JP 2005-255887) in view of Lee et al (US 2005/0168405).
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`In regards to claims 1 and 2, Murakosa discloses a plasma display device
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`comprising:
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`a plasma display panel that has a plurality of discharge cells (15) having a
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`plurality of scan electrodes (SCN1-SCNn) and sustain electrodes (SUS1-SUSn) which
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`form display electrode pairs (Drawing 3 and paragraph 32);
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`a driving circuit (100) that drives the plasma display panel by forming a plurality
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`of subfields in one field period, a subfield having an initializing period (initialization
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`period) for applying a falling ramp waveform voltage to the scan electrodes so as to
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`generate an initializing discharge in the discharge cell (Drawing 5 and paragraph 36-
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`37), an address period (write-in period) for selectively generating an address discharge
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`in the discharge cell (Drawing 5 and paragraph 38), and a sustain period (sustained
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`period and erasing period) for generating a sustain discharge in the discharge cell
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`Application/Control Number: 12/092,102
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`Page 4
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`Art Unit: 2691
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`selected in the address period a number of times corresponding to a brightness weight
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`(Drawing 5 and paragraphs 39-45, 51-54);
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`wherein in the sustain period, the driving circuit alternately applies a sustain
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`pulse varying from a base potential to a potential (Vss) for generating the sustain
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`discharge to the display electrode pairs (Drawing 5 and paragraphs 39-45, 51 -54),
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`applies a base potential (ground or O) to the display electrode pairs during a base
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`period positioned in a subfield between a sustain pulse for generating the final sustain
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`discharge and a previous sustain pulse (Drawing 5 and paragraphs 39-45, 51 -54), and
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`applies a voltage (Ve) for reducing an inter-electrode potential difference of the
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`display electrode pairs to the sustain electrodes after a delay period that is positioned in
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`the subfield after applying the sustain pulse for generating the final sustain discharge to
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`the scan electrodes (Drawing 5 and paragraphs 39-45, 51 -54).
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`Murakosa does not disclose each of the subfields having an initializing period for
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`applying a falling ramp waveform voltage to the scan electrodes so as to generate an
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`initializing discharge in the discharge cell, a lighting ratio calculating circuit that
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`calculates a light ratio of the discharge cells every subfield, the lighting ratio is a ratio of
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`number of lighted discharge cells to the total number of discharge cells in each subfield,
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`wherein the voltage for reducing the inter-electrode potential difference is also applied
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`to the display electrode pairs during an initializing period subsequent to the sustain
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`period and wherein at least one of the base period and the delay period are determined
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`based on the lighting ratio calculated by the lighting ratio calculating circuit.
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`Application/Control Number: 12/092,102
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`Page 5
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`Art Unit: 2691
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`Lee discloses each of the subfields having an initializing period (reset period) for
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`applying a falling ramp waveform (Vs to Vn) voltage to the scan electrodes so as to
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`generate an initializing discharge in the discharge cell (Fig. 4 and paragraphs 31 -32), a
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`lighting ratio calculating circuit (load ratio calculator 410) that calculates a light ratio
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`(load ratio) of the discharge cells every subfield, the lighting ratio is a ratio of number of
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`lighted discharge cells to the total number of discharge cells in each subfield
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`(paragraphs 12 and 46), wherein the voltage (Ve) for reducing the inter-electrode
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`potential difference is also applied to the display electrode pairs during an initializing
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`period subsequent to the sustain period ((Fig. 4 and paragraphs 31 -32) and wherein at
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`least one of the base period and the delay period are determined based on the lighting
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`ratio calculated by the lighting ratio calculating circuit (paragraphs 36-37 and 42).
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`It would have been obvious at the time of invention to modify Murakosa with the
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`teachings of Lee, changing the timing based on a load ratio, because it will improve the
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`picture quality by having light emitting centers coincide with one another every frame.
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`Conclusion
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`4.
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to Michael Pervan whose telephone number is (571)272-
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`0910. The examiner can normally be reached on Monday - Friday between 9am - 5pm.
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`lf attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Amr Awad can be reached on (571) 272-7764. The fax phone number for
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`the organization where this application or proceeding is assigned is 571 -273-8300.
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`Application/Control Number: 12/092,102
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`Page 6
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`Art Unit: 2691
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`Status information for unpublished applications is available through Private PAIR only.
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`system, call 800-786-9199 (IN USA OR CANADA) or 571 -272-1 000.
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`/Michael Pervan/
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`Primary Examiner, Art Unit 2691
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`February 20, 2013
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