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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMIVHSSIONER FOR PATENTS
`PO. Box 1450
`Alexandria1 Virginia 22313-1450
`wwwusptogov
`
`
`
`
`
`14/404,393
`
`11/26/2014
`
`Kazuhiro YAHATA
`
`08279.1755USWO
`
`8756
`
`53148
`7590
`03’24’20”
`HAMRE, SCHUMANN,MUELLER&LARSONP.C. —
`45 South Seventh Street
`INOUSSA’ MOULOUCOULAY
`Suite 2700
`MINNEAPOLIS, MN 55402- 1683
`
`PAPER NUMBER
`
`ART UNIT
`2818
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`03/24/2017
`
`ELECTRONIC
`
`Please find below and/0r attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`following e—mail address(es):
`PTOMail @hsml.com
`
`PTOL—90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 14/404,393 YAHATA ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventor to File)
`Office Action Summary
`
`2818MOULOUCOULAYE INOUSSA $2215
`
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1 .704(b).
`
`In no event, however, may a reply be timely filed
`
`Status
`
`1)IZI Responsive to communication(s) filed on 11/28/2016.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2b)|:l This action is non-final.
`2a)|Z| This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
`
`; the restriction requirement and election have been incorporated into this action.
`
`4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`
`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims*
`
`5)IZI Claim(s) 1-4 and 6-16 is/are pending in the application.
`5a) Of the above claim(s) 7-9 and 12 is/are withdrawn from consideration.
`
`6)I:I Claim(s)
`is/are allowed.
`
`7)|Z| Claim(s) 1 -4 6 10 11 and 13-16is/are rejected.
`8)|:I Claim(s)_ is/are objected to.
`
`
`are subject to restriction and/or election requirement.
`9)I:I Claim((s)
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`hit
`:/'/\W¢W.LISI>I‘.0. ovI’ atentS/init events/
`
`
`
`hI/index.‘s or send an inquiry to PPI-iieedback{®usgtc.00v.
`
`Application Papers
`
`10)I:l The specification is objected to by the Examiner.
`11)|Xl The drawing(s) filed on 11/26/2014 is/are: a)IXI accepted or b)|:l objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`
`12)IXI Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`
`a)IZl All
`
`b)|:l Some” c)I:l None of the:
`
`1.IXI Certified copies of the priority documents have been received.
`2.|:l Certified copies of the priority documents have been received in Application No.
`3.|:| Copies of the certified copies of the priority documents have been received in this National Stage
`
`application from the International Bureau (PCT Rule 17.2(a)).
`** See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`
`
`3) D Interview Summary (PTO-413)
`1) E Notice of References Cited (PTO-892)
`Paper No(s)/Mai| Date.
`.
`.
`4) I:I Other'
`2) I] InformatIon DIsclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
`PTOL—326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mai| Date 20170224
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 2
`
`1.
`
`The present application, filed on or after March 16, 2013, is being examined under the first
`
`inventor to file provisions of the AIA.
`
`DETAILED ACTION
`
`Claim Rejections - 35 USC § 112
`
`2.
`
`The following is a quotation of 35 U.S.C. 112(b):
`
`(b) CONCLUSION—The specification shall conclude with one or more claims particularly pointing out and
`distinctly claiming the subject matter which the inventor or ajoint inventor regards as the invention.
`
`3.
`
`Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as
`
`being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor
`
`or a joint inventor, or for pre-AIA the applicant regards as the invention. In the instant case, the
`
`specification of the present invention discloses oxidized films between lead terminal and securing
`
`member and between the securing member and the heat sink (e.g. see paragraph [0067] and claim 1).
`
`As such, the lead terminal in connected to the heat sink via the securing member and the oxidized films. It
`
`is, therefore, unclear how "the heat sink and the lead terminal are connected only via the securing
`
`member". For the following rejections, it is best understood that Applicant meant to claim, in conformity of
`
`the specification of the present invention, "the heat sink and the lead terminal are connected only via the
`
`securing member and its oxidized surfaces".
`
`Claim Rejections - 35 USC § 103
`
`4.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections
`
`set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not
`identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art
`are such that the claimed invention as a whole would have been obvious before the effective filing date of the
`claimed invention to a person having ordinary skill in the art to which the claimed invention pertains.
`Patentability shall not be negated by the manner in which the invention was made.
`
`5.
`
`Claims 1, 10-11 and 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over
`
`Sasaki et al. (US 2003/0207146 A1 hereinafter referred to as “Sasaki”).
`
`With respect to claim 1, Sasaki discloses, in Figs.5, a semiconductor package comprising: a
`
`heat sink (6) which is a conductive plate and onto which a semiconductor (8) or a matching circuit is to be
`
`placed (see paragraph [0061] wherein heat sink board 6 and semiconductor element 8 are disclosed); a
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 3
`
`lead terminal (4) which is to be electrically-connected to the semiconductor (8) or the matching circuit on
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`the heat sink (6) (see paragraph [0073] wherein copper conductor layer 4 is disclosed); and a securing
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`member (1) which secures the lead terminal (4) to the heat sink (6) (see paragraph [0047] wherein AIN
`
`substrate material 1
`
`is disclosed), and wherein a contacting surface/(Al203 bonding layer) (10) between
`
`the heat sink (6) and the securing member (1) has an oxidized part on its entire surface/(entire upper
`
`surface of securing member 1), and a contacting surface/(CuZO bonding layer) (10) between the securing
`
`member (1) and the lead terminal (4) has an oxidized part on its entire surface/(entire upper surface of
`
`the copper layer 4) (see paragraph [0074] wherein bonding layer 10 is formed using bonding method of
`
`example 1 sample 10; see paragraphs [0051]-[0052] wherein bonding method of example 1 sample 10
`
`comprises surface-oxidized in air the AIN substrate material 1 surfaces to have Al203 (i.e. layers 10) and
`
`wherein a copper metal layer 4 has an oxidized surface of CuZO placed on and bonded to the respective
`
`AIN substrate materials having the Al203 layers formed on their surfaces; that is at least one of the
`
`oxidized bonding surfaces (i.e. either AIZOS or CuZO) between copper metal layer 4 and the AIN substrate
`
`material 1 and between heat sink 6 and the AIN substrate 1). However, Sasaki does not explicitly disclose
`
`that the securing member is formed by a composite resin material in which an epoxy resin and a ceramic
`
`powder are mixed.
`
`Marrs discloses, in Figs.2A-2B, a semiconductor package comprising: a heat sink (101) which is
`
`a conductive plate and onto which a semiconductor (106) or a matching circuit is to be placed
`
`(see column 5, lines 4-5, wherein heat sink 101 and semiconductor die 106 are disclosed); a lead
`
`terminal (102) which is to be electrically-connected to the semiconductor (106) or the matching circuit on
`
`the heat sink (101) (see column 5, line 9 wherein package lead is disclosed); and a securing
`
`member/(electrical conductive adhesive) (112) which secures the lead terminal (102) to the heatsink
`
`(101), wherein the securing member (112) is formed by a composite resin material in which an epoxy
`
`resin and a ceramic powder are mixed (see column 5, lines 61 -63 and column 6, lines 1 -10, wherein
`
`polyimide or epoxy adhesive in which ceramic fill is added is used for either electrically insulative or
`
`electrically conductive adhesive).
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 4
`
`Sasaki and Marrs are analogous art because they are all directed to a semiconductor device
`
`module package, and one of ordinary skill in the art would have had a reasonable expectation of success
`
`by modifying Sasaki to include Marrs because they are from the same field of endeavor.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention
`
`was made to modify the resin adhesive used to sealed the lead to the heat sink in Sasaki by
`
`including composite resin material in which an epoxy resin and ceramic powder are mixed as taught by
`
`Marrs in order to utilize the heat dissipating property of epoxy resin with filled ceramic material thereby
`
`increasing the thermal conductivity of the overall package device.
`
`With respect to claim 10, Marrs discloses, in Figs.2A-2B, the semiconductor package, wherein
`
`the lead terminal (102) is electrically-connected to the heat sink (101) via the securing member (112), and
`
`the ceramic powder mixed in the composite resin material forming the securing member is high-dielectric
`
`(see column 5, lines 61 -63 and column 6, lines 1-10, wherein polyimide or epoxy adhesive in which
`
`ceramic fill is added is used for either electrically insulative or electrically conductive adhesive).
`
`With respect to claim 11, Sasaki discloses, in Figs.5, a semiconductor device comprising: a
`
`semiconductor (8) or a matching circuit; a heat sink (6) which is a conductive plate and onto which the
`
`semiconductor (8) or the matching circuit is bonded (see paragraph [0061] wherein heat sink board 6 and
`
`semiconductor element 8 are disclosed); a lead terminal (4) electrically-connected to the semiconductor
`
`(8) or the matching circuit on the heat sink (6) (see paragraph [0073] wherein copper conductor layer 4 is
`
`disclosed); and a securing member (1) which secures the lead terminal (4) to the heat sink (6) (see
`
`paragraph [0047] wherein AIN substrate material 1
`
`is disclosed), and wherein a contacting surface/(Al203
`
`bonding layer) (10) between the heat sink (6) and the securing member (1) has an oxidized part (10) on
`
`its entire surface/(lower surface), and a contacting surface/(CuZO bonding layer) (10) between the
`
`securing member (1) and the lead terminal (4) has an oxidized part on its entire surface/(lower surface of
`
`copper layer 4) (see paragraph [0074] wherein bonding layer 10 is formed using bonding method of
`
`example 1 sample 10; see paragraphs [0051]-[0052] wherein bonding method of example 1 sample 10
`
`comprises surface-oxidized in air the AIN substrate material 1 surfaces to have Al203 (i.e. layers 10) and
`
`wherein a copper metal layer 4 has an oxidized surface of Cu2O placed on and bonded to the respective
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 5
`
`AIN substrate materials having the AI203 layers formed on their surfaces; that is at least one of the
`
`oxidized bonding surfaces (i.e. either AI203 or Cu20) between copper metal layer 4 and the AIN
`
`substrate material 1 and between heat sink 6 and the AIN substrate 1).
`
`With respect to claim 13, Sasaki discloses, in Figs.5, the semiconductor package, wherein the
`
`heat sink (6) and the lead terminal (4) are connected only via the securing member (1 and 10).
`
`With respect to claim 14, Sasaki discloses, in Figs.5, the semiconductor package, wherein the
`
`heat sink (6) and the lead terminal (4) are connected only via the securing member (1 and 10).
`
`With respect to claim 15, Sasaki discloses, in Figs.5, the semiconductor package, having a
`
`hollow structure where no filler for sealing the semiconductor (8) or the matching circuit is provided on the
`
`surface of the heat sink (6).
`
`With respect to claim 16, Sasaki discloses, in Figs.5, the semiconductor package, having a
`
`hollow structure where no filler for sealing the semiconductor (8) or the matching circuit is provided on the
`
`surface of the heat sink (6).
`
`6.
`
`Claim 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sasaki in view of Marrs,
`
`and further in view of Hasegawa (US 2011/0186983 A1).
`
`With respect to claim 2, the combination of Sasaki and Marrs discloses all the limitation of claim
`
`1. However, the combination of Sasaki and Marrs does not explicitly disclose all the limitations of claim 2.
`
`Hasegawa discloses, in Fig.3, the semiconductor package, wherein the securing member (51)
`
`has a thickness larger than that of the semiconductor (13) or the matching circuit (14A) on the heat
`
`sink (21), and the heat sink (21) and the securing member (51) define a cavity to accommodate the
`
`semiconductor (13) or the matching circuit (see paragraphs [0023] and [0030]).
`
`Sasaki, Marrs and Hasegawa are analogous art because they are all directed to a semiconductor
`
`device module package, and one of ordinary skill in the art would have had a reasonable expectation
`
`of success by modifying Sasaki and Marrs to include Hasegawa because they are from the same field
`
`of endeavor.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention
`
`was made to modify the securing member and heat sink in combination of Sasaki and Marrs by including
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 6
`
`a semiconductor element within a cavity formed by member and heat sink as taught by Hasegawa in
`
`order to provide more protection to the semiconductor element thereby enhancing package protection.
`
`7.
`
`Claim 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sasaki in view of Marrs,
`
`and further in view of Satsu et al. (US 6,225,418 B1 hereinafter referred to as “Satsu”).
`
`With respect to claim 3, the combination of Sasaki and Marrs discloses all the limitation of claim
`
`1. Moreover, the combination of Sasaki and Marrs discloses, see Marrs in Figs.2A-2B, the
`
`semiconductor package, wherein the resin mixed in the composite resin material forming the securing
`
`member and the semiconductor or the matching circuit bonded onto the heat sink. However, the
`
`combination of Sasaki and Marrs does not explicitly disclose the glass-transition temperature of the resin
`
`and heating temperature under which the semiconductor or the matching circuit is bonded onto the heat
`
`sink.
`
`Satsu discloses, in Fig.5, the semiconductor package, wherein a glass-transition temperature of
`
`the resin mixed in the composite resin material forming the securing member is lower than a
`
`heating temperature under which the semiconductor (11) or the matching circuit is bonded onto the heat
`
`sink (see column 23, lines 1 -10, wherein the chip 11 is bonded to heat sink by bonding temperature of
`
`200°C to 260°C; and see column 16, lines 60-61, wherein the glass transition temperature Tg of the resin
`
`is 50°C and 220°C).
`
`Sasaki, Marrs and Satsu are analogous art because they are all directed to a semiconductor
`
`device module package, and one of ordinary skill in the art would have had a reasonable expectation of
`
`success by modifying the combination of Sasaki and Marrs to include Satsu because they are from the
`
`same field of endeavor.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention
`
`was made to modify the curing of resin used to make securing member in the combination of Sasaki and
`
`Marrs by including a resin material with glass temperature lower than that of bonding heat temperature of
`
`the chip as taught by Satsu in order to utilize the change of temperature offered by the composite resin
`
`material thereby prevent swelling and cracking which may occur at the interfaces of the composite
`
`material.
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 7
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`8.
`
`Claim 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sasaki in view of Marrs,
`
`and further in view of Casati et al. (US 6,002,173 hereinafter referred to as “casati”).
`
`With respect to claim 4, the combination of Sasaki and Marrs discloses all the limitation of claim
`
`1. However, the combination of Sasaki and Marrs does not explicitly disclose the limitations of claim 4.
`
`Casati discloses, in Figs.1-3, the semiconductor package according, wherein the heatsink (2) or
`
`the lead terminal (11) has a roughened part in a position to have contact with the securing member
`
`(see column 5, lines 34-37, wherein areas of the plate and lead exhibit an amount of roughness).
`
`Sasaki, Marrs and Casati are analogous art because they are all directed to a semiconductor
`
`device module package, and one of ordinary skill in the art would have had a reasonable expectation of
`
`success by modifying the combination of Sasaki and Marrs to include Casati because they are from the
`
`same field of endeavor.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention
`
`was made to modify areas of heat sink plate and lead of the combination of Sasaki and Marrs by
`
`including high amount of roughness as taught by Casati in order to enhance the adhesion of the resin
`
`composite adhesive to the leads and heat sink plate thereby improving the stability and the mechanical
`
`bonding for highly reliable hermetic package.
`
`9.
`
`Claim 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sasaki in view of Marrs,
`
`and further in view of Edwards et al. (US 6,650,662 hereinafter referred to as “Edwards”).
`
`With respect to claim 6, the combination of Sasaki and Marrs discloses all the limitation of claim
`
`1. However, the combination of Sasaki and Marrs does not explicitly disclose the limitations of claim 6.
`
`Edwards discloses, in Figs.1 -2, the semiconductor package, wherein the heat sink or the lead
`
`terminal (22) has a plated portion in a position not to have contact with the securing member (see
`
`column 4, lines 29-30, wherein plating layers 22 are disclosed).
`
`Sasaki, Marrs and Edwards are analogous art because they are all directed to a semiconductor
`
`module package, and one of ordinary skill in the art would have had a reasonable expectation of
`
`success by modifying the combination of Sasaki and Marrs to include Edwards because they are from the
`
`same field of endeavor.
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 8
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention
`
`was made to modify the lead terminal in the combination of Sasaki and Marrs by including a metallic
`
`plating layers as taught by Edwards in order to utilize the electrical path establish by plating leads thereby
`
`enhancing the electrical conductivity of the package.
`
`Response to Arguments
`
`10.
`
`Applicant’s arguments with respect to claims 1 and 11 have been considered but are moot
`
`because the arguments do not apply to at least one of the references being used in the current rejection.
`
`Conclusion
`
`11.
`
`Applicant's amendment necessitated the new ground(s) of rejection presented in this Office
`
`action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of
`
`the extension of time policy as set forth in 37 CFR 1.136(a).
`
`A shortened statutory period for reply to this final action is set to expire THREE MONTHS from
`
`the mailing date of this action.
`
`In the event a first reply is filed within TWO MONTHS of the mailing date
`
`of this final action and the advisory action is not mailed until after the end of the THREE-MONTH
`
`shortened statutory period, then the shortened statutory period will expire on the date the advisory action
`
`is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of
`
`the advisory action.
`
`In no event, however, will the statutory period for reply expire later than SIX
`
`MONTHS from the date of this final action.
`
`Telephone/Fax Information
`
`12.
`
`Any inquiry concerning this communication or earlier communications from the examiner should
`
`be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571 )272—0596. The examiner
`
`can normally be reached on Monday-Friday.
`
`Examiner interviews are available via telephone, in-person, and video conferencing using a
`
`USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use
`
`the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
`
`

`

`Application/Control Number: 14/404,393
`
`Art Unit: 2818
`
`Page 9
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor,
`
`STEVEN H. LOKE can be reached on 5712721657. The fax phone number for the organization where
`
`this application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the Patent Application
`
`Information Retrieval (PAIR) system. Status information for published applications may be obtained from
`
`either Private PAIR or Public PAIR. Status information for unpublished applications is available through
`
`Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should
`
`you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC)
`
`at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative
`
`or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-
`
`1000.
`
`/MOULOUCOULAYE INOUSSA/
`
`Examiner, Art Unit 2818
`
`/DAVID VU/
`
`Primary Examiner, Art Unit 2818
`
`