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`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www .uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKETNO.
`
`CONFIRMATIONNO.
`
`14/533,561
`
`11/05/2014
`
`Jun Fujiyoshi
`
`0520-52005CX1
`
`5811
`
`TYPHA IPLLC
`
`1819 L Street NW Suite 200
`Washington, DC 20036
`
`Le
`
`
`
`CHUNG, DAVID 'Y
`
`PAPER NUMBER
`
`ART UNIT
`
`2871
`
`MAIL DATE
`
`04/04/2017
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Status
`1) Responsive to communication(s)filed on14February2017.
`LJ A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiledon__
`2a)L] This action is FINAL.
`2b) This action is non-final.
`3)L] Anelection was made bythe applicant in responsetoarestriction requirementset forth during the interview on
`
`___} the restriction requirement and election have been incorporated into this action.
`4)[] Since this application is in condition for allowance exceptfor formal matters, prosecution as to the merits is
`closed in accordance with the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`5)X] Claim(s) 1-20 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`6)L] Claim(s)
`is/are allowed.
`7) Claim(s) 1-20 is/are rejected.
`8)L] Claim(s)____is/are objectedto.
`
`9)L] Claim(s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`
`nito/www. uspte.gov/natenis/init events/poh/index.isp
`
`or send an inquiry to PPHieedback@uspte.aov.
`
`Application Papers
`10)L] The specification is objected to by the Examiner.
`11) The drawing(s)filed on 05 November 2014 is/are: a)X] accepted or b)[_] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)X] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`a)X] All
`)[_] Some** c)] None ofthe:
`1.x] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`““ See the attached detailed Office action for a list of the certified copies not received.
`
`
`
`Applicant(s)
`Application No.
` 14/533,561 FUJIYOSHI ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventorto File)
`Office Action Summary
`
`2871DAVID CHUNG Na
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a).
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Anyreply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`In no event, however, may a reply betimely filed
`
`Attachment(s)
`3) CT] Interview Summary (PTO-413)
`1) X Notice of References Cited (PTO-892)
`Paper No(s)/Mail Date.
`:
`.
`4) Ol Other:
`2) CT] Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20170403
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 2
`
`The present application is being examined underthe pre-AlA first to invent
`
`provisions.
`
`DETAILED ACTION
`
`Continued Examination Under 37 CFR 1.114
`
`A requestfor continued examination under 37 CFR 1.114, including the fee set
`
`forth in 37 CFR 1.17(e), wasfiled in this application after final rejection. Since this
`
`application is eligible for continued examination under 37 CFR 1.114, and the fee set
`
`forth in 37 CFR 1.17(e) has beentimely paid, the finality of the previous Office action
`
`has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on
`
`February 14, 2017 has been entered.
`
`Claim Rejections - 35 USC § 102
`
`The following is a quotation of the appropriate paragraphs of pre-AlIA 35 U.S.C.
`
`102 that form the basis for the rejections underthis section madein this Office action:
`
`A person shall be entitled to a patent unless —
`
`(b) the invention was patented or described in a printed publication in this or a foreign country
`or in public use or on sale in this country, more than one yearprior to the date of application
`for patent in the United States.
`
`Claims 1 and 3-8 are rejected under pre-AlA 35 U.S.C. 102(b) as being
`
`anticipated by Tanabeet al. (US 2009/0079890).
`
`As to claim 1, Tanabedisclosesin figure 8: a liquid crystal display device
`
`comprising a plurality of pixels, each including a thin film transistor and a pixel electrode
`
`110 formed above a substrate 10, and an organic insulation film 109 formed between
`
`the drain electrode 130 of the thin film transistor and the pixel electrode; wherein the
`
`drain electrode 130 and the pixel electrode 110 are connected through a contact hole
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 3
`
`formedin the organic insulation film 109; wherein a sidewall of the contact hole is
`
`tapered; wherein an underlying layer 108 beneath the organic insulation film, in contact
`
`with the organic insulation film, has an upper surface facing the organic insulation film
`
`and located on an opposite side to the substrate; wherein the upper surface includes a
`
`lowermost plane extending substantially parallel to a plane of the substrate and an
`
`uppermost plane extending substantially parallel to the plane of the substrate; wherein
`
`the lowermost plan overlaps with the sidewall in plan view and intersects the sidewall at
`
`a first intersection point; wherein the uppermost plane is at a position farther from the
`
`substrate than a position of the lowermostplane from the substrate, and is in physical
`
`contact with the organic insulation film, and is disposed at a side of the lowermost
`
`plane, the side of the lowermostplane being disposed at a position spaced from the
`
`sidewall; wherein a single step of the upper surface is formed so as to extend between
`
`the uppermostplane and the lowermost plane, wherein the uppermostplane intersects
`
`a side wall of the single step at a second intersection point, and wherein the upper
`
`surfaceis in physical contact with organic insulation film 109 from thefirst intersection
`
`point to the second intersection point continuously.
`
`Asto claims 3-5, Tanabedisclosesall of the elements of the claimed invention
`
`discussed above regarding claim 1. Tanabe further disclosesin figure 3 that the
`
`underlying layer 108 is located above a gate wire 105 (scan signal line) and a video
`
`signal line 107.
`
`Asto claim 6, Tanabedisclosesall of the elements of the claimed invention
`
`discussed above regarding claim 5. Tanabefurther disclosesin figure 8 that the
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 4
`
`uppermost plane overlaps with the gate wire 105 (scan signalline) and the lowermost
`
`plane does not overlap with the gate wire 105 (scan signalline).
`
`Asto claim 7, Tanabedisclosesall of the elements of the claimed invention
`
`discussed above regarding claim 1. Tanabefurther discloses that the underlying layer
`
`108 is formed in the same manneras layer 101. See paragraph [0068]. Kim discloses
`
`that layer 101 is formed ofsilicon nitride. See paragraph [0063].
`
`Asto claim 8, Tanabedisclosesall of the elements of the claimed invention
`
`discussed above regarding claim 1. Tanabe further disclosesin figure 8 that the single
`
`step is formed by a difference in the numberof layers that are formed underthe organic
`
`insulation film due to the presenceofthe thin film transistor.
`
`Claim Rejections - 35 USC § 103
`
`The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis
`
`for all obviousnessrejections set forth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described
`as set forth in section 102, if the differences between the subject matter sought to be patented
`and the prior art are such that the subject matter as a whole would have been obviousat the
`time the invention was made to a person having ordinary skill in the art to which said subject
`matter pertains. Patentability shall not be negatived by the manner in which the invention was
`made.
`
`Claim 9 is rejected under pre-AlA 35 U.S.C. 103(a) as being unpatentable
`
`over Tanabeetal. (US 2009/0079890).
`
`Tanabedisclosesall of the elements of the claimed invention discussed above
`
`regarding claim 1, but does not disclose that the distance from a position at which the
`
`sidewall intersects with the lowermost plane to an end of the lowermost plane abutting
`
`the single step is no greater than 1 um. However, it would have been obvious to one of
`
`ordinary skill in the art at the time of invention to modify Tanabein this fashion in order
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 5
`
`to maximize the aperture ratio of the display by minimizing the size of the thin film
`
`transistor.
`
`Claim 2 is rejected under pre-AlA 35 U.S.C. 103(a) as being unpatentable
`
`over Tanabeetal. (US 2009/0079890) as applied to claim 1 above, and in view of
`
`Kim et al. (US 2004/0125277).
`
`Tanabedisclosesall of the elements of the claimed invention discussed above
`
`regarding claim 1, but does not disclose that the organic insulation film is a color filter
`
`layer. Kim disclosesin figure 4, an organic insulation film 132 whichis a color filter
`
`layer. Kim teaches forming the colorfilter on the array substrate in the manner
`
`disclosed leads to increased aperture ratio. See paragraph [0090]. Therefore, it would
`
`have been obvious to one of ordinary skill in the art at the time of invention to modify
`
`Tanabe by making the organic insulation film a color filter layer in order to increase
`
`aperture ratio as taught by Kim.
`
`Claims 10-20 are rejected under pre-AlA 35 U.S.C. 103(a) as being
`
`unpatentable over Tanabeetal. (US 2009/0079890) in view of Kim et al. (US
`
`2004/0125277).
`
`Asto claims 10 and 15, Tanabe disclosesin figure 8: a liquid crystal display
`
`device comprising a plurality of pixels, each including a thin film transistor and a pixel
`
`electrode 110 formed above a substrate 10, and an organic insulation film 109 formed
`
`betweenthe drain electrode 130 of the thin film transistor and the pixel electrode;
`
`wherein the drain electrode 130 and the pixel electrode 110 are connected through a
`
`contact hole formed in the organic insulation film 109; wherein a sidewall of the contact
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 6
`
`hole is tapered; wherein an underlying layer 108 beneath the organic insulation film, in
`
`contact with the organic insulation film, has an upper surface facing the organic
`
`insulation film and located on an opposite side to the substrate; wherein the upper
`
`surface includes a lowermost plane extending substantially parallel to a plane of the
`
`substrate and an uppermost plane extending substantially parallel to the plane of the
`
`substrate; wherein the lowermost plan overlaps with the sidewall in plan view and
`
`intersects the sidewall at a first intersection point; wherein the uppermostplane is at a
`
`position farther from the substrate than a position of the lowermostplane from the
`
`substrate, and is in physical contact with the organic insulation film, and is disposed at a
`
`side of the lowermostplane, the side of the lowermost plane being disposedat a
`
`position spaced from the sidewall; wherein a single step of the upper surface is formed
`
`so as to extend between the uppermostplane and the lowermost plane, wherein the
`
`uppermostplane intersects a side wall of the single step at a secondintersection point,
`
`and wherein the upper surfaceis in physical contact with organic insulation film 109
`
`from the first intersection point to the second intersection point continuously.
`
`Tanabe doesnot disclose that the organic insulation film is a colorfilter layer.
`
`Kim disclosesin figure 4, an organic insulation film 132 whichis a color filter layer. Kim
`
`teaches forming the colorfilter on the array substrate in the mannerdisclosed leads to
`
`increased aperture ratio. See paragraph [0090]. Therefore, it would have been obvious
`
`to one of ordinary skill in the art at the time of invention to modify Tanabe by making the
`
`organic insulation film a color filter layer in order to increase aperture ratio as taught by
`
`Kim.
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 7
`
`Asto claim 11, Tanabein view of Kim discloses all of the elements of the
`
`claimed invention discussed above regarding claim 10. Tanabe further disclosesin
`
`figure 3 that the underlying layer 108 is located above a gate wire 105 (scan signalline)
`
`and a videosignalline 107.
`
`Asto claim 12, Tanabe in view of Kim disclosesall of the elements of the
`
`claimed invention discussed above regarding claim 10. Tanabe further disclosesin
`
`figure 8 that the uppermostplane overlaps with the gate wire 105 (scan signal line) and
`
`the lowermost plane does not overlap with the gate wire 105 (scan signalline).
`
`Asto claim 14, Tanabein view of Kim discloses all of the elements of the
`
`claimed invention discussed above regarding claim 10. Kim further disclosesin figures
`
`3 and 4: acolor filter layer 132 which includes a red colorfilter 132a and a green color
`
`filter 132b; wherein a part of the red colorfilter 136a is superposed on a part of the
`
`green color filter 136b. Tanabe further disclosesin figure 8 that the underlying layer
`
`108 includesafirst plane and a second plane nearerto the substrate than the first
`
`plane, wherein the first plane and second plane are at the upper surface, and a stepis
`
`formed to extend between the first plan’ and the second plane. Furthermore, Tanabe
`
`when modified by Kim includesa first plane overlapping with an end portion of the green
`
`color filter and a second plane disposedat a side ofthe first plane that is spaced apart
`
`from the end portion.
`
`Asto claim 16, Tanabein view of Kim disclosesall of the elements of the
`
`claimed invention discussed above regarding claim 15. Kim further disclosesin figures
`
`3 and 4: a color filter layer 132 which includes a red colorfilter 132a and a green color
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 8
`
`filter 132b; wherein a part of the red colorfilter 136a is superposed on a part of the
`
`green color filter 136b. Tanabe further disclosesin figure 8 that the underlying layer
`
`108 includes a third plane and a fourth plane nearer to the substrate than the third
`
`plane, wherein the third plane and fourth plane are at the upper surface, and a stepis
`
`formed to extend betweenthe third plane and the fourth plane. Furthermore, Tanabe
`
`when modified by Kim includes a third plane overlapping with an end portion of the
`
`green color filter and a fourth plane disposedat a side of the third plane that is spaced
`
`apart from the end portion.
`
`Asto claim 17, Tanabe in view of Kim discloses all of the elements of the
`
`claimed invention discussed above regarding claim 16. Tanabe further discloses in
`
`figure 8 that the gate wire 105 (scan signalline) is located underthe third plane.
`
`Asto claim 18, Tanabein view of Kim disclosesall of the elements of the
`
`claimed invention discussed above regarding claim 15. Tanabe further discloses in
`
`figure 8 that the uppermostplane overlaps with the gate wire 105 (scan signal line) and
`
`the lowermost plane does not overlap with the gate wire 105 (scan signalline).
`
`Asto claim 19, Tanabein view of Kim disclosesall of the elements of the
`
`claimed invention discussed above regarding claim 15. Tanabe further discloses in
`
`figure 8 that the first step surrounds the contact hole.
`
`Asto claims 13 and 20, Tanabein view of Kim discloses all of the elements of
`
`the claimed invention discussed above regarding claims 10 and 15, but does not
`
`disclose that the distance from a position at which the sidewall intersects with the
`
`lowermost plane to an end of the lowermostplane abutting the single step is no greater
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 9
`
`than 1 um. However, it would have been obvious to one of ordinary skill in the art at the
`
`time of invention to further modify Tanabe in this fashion in order to maximize the
`
`aperture ratio of the display by minimizing the size of the thin film transistor.
`
`Response to Arguments
`
`Applicant’s arguments with respect to claims 1-20 have been considered but are
`
`moot in view of the new groundsofrejection. The new groundsof rejection are based
`
`on the applying the newly cited prior art of Tanabe et al. (US 2009/0079890) as the
`
`primary reference.
`
`Conclusion
`
`Anyinquiry concerning this communication or earlier communications from the
`
`examiner should be directed to David Chung whose telephone numberis (571) 272-
`
`2288. The examiner can normally be reached Mondaythru Friday from 8:30 AM to 5:00
`
`PM.
`
`If attempts to reach the examinerby telephone are unsuccessful, the examiner’s
`
`supervisor Ed Glick can be reached at (571) 272-2490. The fax numberfor the
`
`organization wherethis application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the
`
`Patent Application Information Retrieval (PAIR) system. Status information for
`
`published applications may be obtained from either Private PAIR or Public PAIR.
`
`Status information for unpublished applications is available through Private PAIR only.
`
`For more information about the PAIR system, see http://pair-direct.uspto.gov. Should
`
`you have questions on accessto the Private PAIR system, contact the Electronic
`
`Business Center (EBC) at 866-217-9197(toll-free).
`
`If you would like assistance from a
`
`

`

`Application/Control Number: 14/533,561
`Art Unit: 2871
`
`Page 10
`
`USPTO Customer Service Representative or access to the automatedinformation
`
`system, call 800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/David Y. Chung/
`Examiner, Art Unit 2871
`
`/Edward Glick/
`Supervisory Patent Examiner, Art Unit 2871
`
`

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