`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www .uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKETNO.
`
`CONFIRMATIONNO.
`
`14/074,870
`
`11/08/2013
`
`Toshihiro SATO
`
`0520-41436CC2
`
`4668
`
`TYPHA IPLLC
`
`1819 L Street NW Suite 200
`Washington, DC 20036
`
`Le
`
`LLLIN
`
`PAPER NUMBER
`
`DELIVERY MODE
`
`PAPER
`
`ART UNIT
`
`2693
`
`MAIL DATE
`
`08/11/2016
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Status
`1) Responsive to communication(s)filed on 7/8/2016.
`LJ A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiledon__
`2a)L] This action is FINAL.
`2b) This action is non-final.
`3)L] Anelection was made bythe applicant in responsetoarestriction requirementset forth during the interview on
`
`___} the restriction requirement and election have been incorporated into this action.
`4)[] Since this application is in condition for allowance exceptfor formal matters, prosecution as to the merits is
`closed in accordance with the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`5)KX] Claim(s) 1-5 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`6)L] Claim(s)
`is/are allowed.
`7) Claim(s) 1-5 is/are rejected.
`8)L] Claim(s)____is/are objectedto.
`
`9)L] Claim(s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`
`nito/www. uspte.gov/natenis/init events/poh/index.isp
`
`or send an inquiry to PPHieedback@uspte.aov.
`
`Application Papers
`10)L] The specification is objected to by the Examiner.
`
`11)L] The drawing(s)filed on
`is/are: a)L_] accepted or b)L_] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)[] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`a)L] All
`b)[-] Some** c)L] None ofthe:
`1..] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`““ See the attached detailed Office action for a list of the certified copies not received.
`
`
`
`Applicant(s)
`Application No.
` 14/074,870 SATO ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventorto File)
`Office Action Summary
`
`2693LIN LI Na
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a).
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Anyreply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`In no event, however, may a reply betimely filed
`
`Attachment(s)
`3) CT] Interview Summary (PTO-413)
`1) X Notice of References Cited (PTO-892)
`Paper No(s)/Mail Date.
`:
`.
`4) Ol Other:
`2) CT] Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20160721
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 2
`
`DETAILED ACTION
`
`Notice of Pre-AlA or AIA Status
`
`1.
`
`The present application, filed on or after March 16, 2013, is being examined
`
`underthefirst inventor to file provisions of the AIA.
`
`Continued Examination Under 37 CFR 1.114
`
`2.
`
`A requestfor continued examination under 37 CFR 1.114, including the fee set
`
`forth in 37 CFR 1.17(e), wasfiled in this application after final rejection. Since this
`
`application is eligible for continued examination under 37 CFR 1.114, and the fee set
`
`forth in 37 CFR 1.17(e) has beentimely paid, the finality of the previous Office action
`
`has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 8,
`
`2016 has been entered.
`
`Claim Rejections - 35 USC § 112
`
`3.
`
`The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
`
`INGENERAL.—The specification shall contain a written description of the
`(a)
`invention, and of the manner and process of making and usingit, in suchfull, clear, concise,
`and exact terms as to enable any person skilled in the art to whichit pertains, or with whichit
`is most nearly connected, to make and use the same, and shall set forth the best mode
`contemplated by the inventor or joint inventor of carrying out the invention.
`
`4.
`
`Claims 1-5 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AlA), first
`
`paragraph, asfailing to comply with the written description requirement. The claim(s)
`
`contains subject matter which wasnot described in the specification in such a way as to
`
`reasonably conveyto one skilled in the relevant art that the inventor or a joint inventor,
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 3
`
`or for pre-AlA the inventor(s), at the time the application wasfiled, had possessionof
`
`the claimed invention.
`
`Claim 1 recites the newly addedlimitation of “the lower electrodeis divided from
`
`the channel layer at the same layer, and is not electrically connected with the channel
`
`layer” is not described in the original disclosure. In Applicant's Arguments/Remarksfiled
`
`on July 8, 2016, it does not indicate where theoriginal specification describes the newly
`
`addedlimitation. According to the original specification, page 15, lines 1-3, it describes
`
`that “The dual gate system is adopted for the first TFT 21 in order to abate the decrease
`
`of the storage charge of the capacitor 23 owing to leaking current. The driver transistor
`
`for the second TFT 22 is disposedin folds in order to obtain a comparatively large gate
`
`length. The capacitor 23 is disposed under the wiring system in order to reduce the
`
`affect of the pixel upon the aperture 28. The otherpole (the other terminal) of the
`
`capacitor 23 is electrically connected to the gate line that is scanned anterior to that
`
`being scanned” which clearly shows both electrodes of the capacitor are electrically
`
`connectedto the pixel circuit including the channelof the active device (emphasis
`
`added) in order to charge anelectrical signal into the storage capacitor, wherein the
`
`electrical signal is applied from the source/gate terminals of the active device through
`
`the channel of the active device to the lower electrode of the capacitor. In addition,
`
`claim 3 recites “the active device is connectedto the lower electrode” which also
`
`represents that the channellayer of the active device is electrically connected to the
`
`lower electrode (emphasis added). Furthermore, based on the fundamentalelectrical
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 4
`
`theory, the capacitor is electrically connected to an electrical circuitry in order to perform
`
`its function. Therefore, the newly addedlimitation is considered as new matter.
`
`Claims 2-5 are dependent claim of claim 1. Therefore, claims 2-5 are also
`
`rejected with same reasoning as claim 1.
`
`Claim Rejections - 35 USC § 103
`
`5.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all
`
`obviousnessrejections setforth in this Office action:
`
`A patentfor a claimed invention may not be obtained, notwithstanding that the claimed
`invention is not identically disclosed as set forth in section 102 of this title, if the differences
`between the claimed invention and the prior art are such that the claimed invention as a whole
`would have been obvious before the effectivefiling date of the claimed invention to a person
`having ordinaryskill in the art to which the claimed invention pertains. Patentability shall not
`be negated by the manner in which the invention was made.
`
`6.
`
`Claims 1-3, 5 are rejected under 35 U.S.C. 103 as being unpatentable over
`
`Kimura (US 7012290 B2), in view of Yamada (US 7090936 B1).
`
`Asto claim 1: Kimura discloses an organic EL display module (Figs. 2-5, “an
`
`organic EL display module”) comprising a pixel disposed in respective intersections
`
`belweer a plurality of scanning lines and a plurality of data lines (Fig. 5A shows “a pixel”
`
`disposed in respective intersections between “a plurality of scanning lines” and “a
`
`plurality of data lines”), and a current supplyline that supplies electric current to the
`
`pixel (Fig. 2B, “a current supply lines 207" that supplies electric current to the mixel}, the
`
`plurality of scanning lines and the plurality of data ines being aligned in a matrix (Fig.
`
`5A shows the plurality of scanning ines and the plurailly of data lines being aligned ina
`
`Matix},
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 5
`
`wherein the pixel includes an active device thal is selected by one of the
`
`scanning lines (Fig. 2B, “an active device 201"), 4 dala siorage device thai stores a data
`
`signal that is supplied fromm one of the data lines (Fig. 2B, “a data storage device 204"),
`
`and an organic light emitting device that emits light by the electric current sunpiied by
`
`the current supply line accarding to the data signal stored in the data slorage device
`
`(Fig. 2B, “an organic light errutting device 203°; cal. 19, lines 20-29) cal. 25, lines 9-36,
`
`“an organic material usec for the light-emitting layer’), wherein the data storage device
`
`provides a lower electrode, an insulating layer, and an upper electrode (Figs. 2A-2h
`
`show the data device provides a lower clecirocie which is connected to the currentline,
`
`an upper electrode is connected to “a drain/source of the active device 201", and “an
`
`insulating layer” between the iower electrode and the upper siectrocie),
`
`wherein the lower electrode and a charine! layer of ihe active device are located at a
`
`same layer (Fig. 25 shows the lower electrode of ihe capacitor 204 and a channel layer
`
`of the active device 201 are located at a same layer (see Fig. 2A belaw)}, and
`
`wherein the lower electrode is divided frarn the channel layer at the same layer, and
`
`is nol slectrically connected with the channel layer (Fig. 2A shows the lower electrode of
`
`the storage 204 is commected to the curreni line at "a drain/source electrode of a driving
`
`transistor 202", wherein the lower Glectrocie is divided from ihe channel layer at the
`
`same layer, and is not electrically connected with the channel layer if the electrical
`
`signal is rot anplied to between the channel layer of the active device and the lower
`
`electrode of the storage device}.
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 6
`
`Kimura discloses the clairned inveniion except that ihe upper electrode is made of a
`
`méial material. However, Yamada teaches an organic EL display module comprises a
`
`storage device, wherein the storage device includes a lower electrode, an insulating
`
`layer, and an upper electrode, wherein the upper electrode is macie by a metal material
`
`(Fig. 1, “arorganic EL dismlay module 140° comprises “a storage device 56”; Fig. 4, the
`
`storage device includes “a lower electrode 55", “an insulating layer 12°, and “an upper
`
`electrode 54”, wherein the upper electrode is made by a metal: col. 7, lines 38-48, “The
`
`storage capacitor electrode line 54 is made of a maternal such as chrome”). At the time
`
`of the invention was made, it would have been obvious to one of ordinary skill in the art
`
`would have been motivated to modify Kimura to select a metal material for the upper
`
`electrode of the storage device, wherein the upperelectrode is made of a metal material
`
`as taught by Yamada. The motivation would have beenin order to form a storage
`
`capacitor by allowing charges to be accumulated between the lower capacitor electrode
`
`and the upper capacitor electrode (Yamada: col. 1, lines 38-48).
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 7
`
`aMeens,
`s
`
`o
`
` is
`
`s
`
`
`
` OfVOLLLLLELLEyBIWor
`
` LED
`
`As to claim 2: Ciaim 2 is a dependent claim of claim 1. The prior art Yamada further
`
`discloses the claimed limitation of wherein the upper electrode has a same layer with
`
`the scanming fine (Fig. 44 shows the upper electrode 54 of the storage device has a
`
`same layer with the gale slectrode 11 which is extended fram the scanning line 54
`
`shown in Fig. 3). in addition, the sarne motivation is used as the rejection of claim 2.
`
`As to claim 3: Claim S is a dependent claim of claim 1. The prior art Yamada further
`
`discloses the claimed limitation of wherein the active device is connected to the lower
`
`electrade (Figs. 3, 44 shows the active device 30 is connected ta the lower electrocie 55
`
`of the storage device}. In acicition, the same motivation is used as the rejection of claim
`
`3.
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 8
`
`As to claim 3: Kimura discioses wherein the lower electrode is separated fram the
`
`channel layer by a space (Fig. 2A shows the lower electrode of the storage device 204
`
`is separated from the channel layer by a space).
`
`7.
`
`Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Kimura (US
`
`7012290 B2), in view of Yamada (US 7090936 B1) as applied to claim 1 above, and
`
`further in view of Kuroda (US 4797371).
`
`As to claim 4: Kimura discloses comorising:
`
`a driving transisior thal contrais & current supplied fram the current supply line to the
`
`organic ight emitting device (Fig. 25. “a driving iransistar 202” that conircis a current
`
`supplied from the current supply line 207 to the organic light emilting device 203},
`
`wherein a channel portion of the driving transistor is forrned using the upper
`
`electrode (Fig. 24 shows “a channel portion of the driving transistor 202 is formed using
`
`the upper electrode}.
`
`Kimura and Yamada do not expressly disclose using the upper electrode as a mask
`
`for jon implantation. However, Kuroda teaches an upper electrode as a mask for ion
`
`imiplantation (col 1G, lines 28-35, “ion implantation uses upper eleciracde 83 for a
`
`mask"). At the time of the invention was made, it would have been obvious to one of
`
`ordinary skill in the art would have been motivated to modify Kimura and Yamadato use
`
`the upper electrode as a maskfor ion implantation as taught by Kuroda. The motivation
`
`would have beenin order to have the process of ion implantation be greatly simplified
`
`(Kuroda: col. 10).
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 9
`
`Response to Arguments
`
`8.
`
`Applicant’s arguments, see Arguments/Remarks, filed July 8, 2016, with
`
`amendmenthave beenfully considered but are mootin view of a new ground(s) of
`
`rejection.
`
`Conclusion
`
`9.
`
`Anyinquiry concerning this communication or earlier communications from the
`
`examiner should be directed to LIN LI whose telephone number is (571)270-1584. The
`
`examiner can normally be reached on Monday- Friday: 8:00am - 5:00pm.
`
`If attempts to reach the examinerby telephone are unsuccessful, the examiner's
`
`supervisor, Quan-Zhen Wang can be reached on 5712723114. The fax phone number
`
`for the organization wherethis application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the
`
`Patent Application Information Retrieval (PAIR) system. Status information for
`
`published applications may be obtained from either Private PAIR or Public PAIR.
`
`Status information for unpublished applications is available through Private PAIR only.
`
`For more information about the PAIR system, see http://pair-direct.uspto.gov. Should
`
`you have questions on accessto the Private PAIR system, contact the Electronic
`
`Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a
`
`USPTO Customer Service Representative or access to the automatedinformation
`
`system, call 800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/LIN LI/
`Examiner, Art Unit 2693
`
`