UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 2231371450
`www.uspto.gov
`
`15/657,987
`
`07/24/2017
`
`Kenta Matsuyama
`
`P170773US00
`
`9909
`
`WESTERMAN, HATTORI, DANIELS & ADRIAN, LLP
`8500 LEESBURG PIKE
`SUITE 7500
`
`TYSONS, VA 22182
`
`GOLDEN ANDREW J
`
`1726
`
`PAPER NUMBER
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`01/31/2020
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`
`following e—mail address(es):
`
`patentmai1@ whda.eom
`
`PTOL-90A (Rev. 04/07)
`
`

`

`0/7709 A0170” Summary
`
`Application No.
`15/657,987
`Examiner
`ANDREW J GOLDEN
`
`Applicant(s)
`Matsuyama, Kenta
`Art Unit
`AIA (FITF) Status
`1726
`Yes
`
`- The MAILING DA TE of this communication appears on the cover sheet wit/7 the correspondence address -
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR 1.136(a). In no event, however, may a reply be timely filed after SIX (6) MONTHS from the mailing
`date of this communication.
`|f NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`1). Responsive to communication(s) filed on 27 September 2019.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2a). This action is FINAL.
`
`2b) D This action is non-final.
`
`3)[:] An election was made by the applicant in response to a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
`
`4):] Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Expade Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims*
`
`5)
`
`Claim(s)
`
`1—2,5—6,9—10,13 and 18—24 is/are pending in the application.
`
`5a) Of the above claim(s)
`
`is/are withdrawn from consideration.
`
`
`
`[:1 Claim(ss)
`
`is/are allowed.
`
`8)
`Claim(s 1 —2, 5—6, 9— 10, 13 and 18 2—4 is/are rejected.
`
`D Claim(ss_) is/are objected to.
`
`) ) ) )
`
`S)
`are subject to restriction and/or election requirement
`[:1 Claim(s
`* If any claims have been determined aflowable. you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`
`http://www.uspto.gov/patents/init events/pph/index.jsp or send an inquiry to PPeredback@uspto.gov.
`
`Application Papers
`
`10)|:l The specification is objected to by the Examiner.
`
`is/are: a)[] accepted or b)l:] objected to by the Examiner.
`11)[:] The drawing(s) filed on
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`
`12)D Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`
`a)I:l All
`
`b)|:] Some**
`
`c)l:i None of the:
`
`1C] Certified copies of the priority documents have been received.
`
`2C] Certified copies of the priority documents have been received in Application No.
`
`3D Copies of the certified copies of the priority documents have been received in this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`
`** See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1)
`
`Notice of References Cited (PTO-892)
`
`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date_
`U.S. Patent and Trademark Office
`
`3) E] Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`4) CI Other-
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mai| Date 20191115
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 2
`
`DETAILED ACTION
`
`Notice of Pre-AIA or AIA Status
`
`1.
`
`The present application, filed on or after March 16, 2013,
`
`is being examined
`
`under the first inventor to file provisions of the AIA.
`
`Status of Claims
`
`2.
`
`Claims 1-2, 5-6, 9-10, 13 and 18-24 are presently under consideration. Claims 3-
`
`4, 7-8, 11-12, and 14-17 are cancelled.
`
`3.
`
`Applicant’s amendments to the claims filed in the amendment dated 27
`
`September 2019 have overcome the indefiniteness and prior art rejections of record set
`
`forth in the non-final rejection dated 28 May 2019, and these rejections are therefore
`
`withdrawn.
`
`4.
`
`Upon performing an updated search and consideration of the amended claims,
`
`new prior art was uncovered and a new rejection is presented below.
`
`Claim Rejections - 35 USC § 103
`
`5.
`
`In the event the determination of the status of the application as subject to AIA 35
`
`U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any
`
`correction of the statutory basis for the rejection will not be considered a new ground of
`
`rejection if the prior art relied upon, and the rationale supporting the rejection, would be
`
`the same under either status.
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 3
`
`6.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all
`
`obviousness rejections set forth in this Office action:
`
`A patent for a claimed invention maynotbe obtained, notwithstanding that the claimed
`invention is not identicallydisclosed as set forth in section 102, if the differences between the
`claimed invention and the priorartare such that the claimed invention as awhole would have
`been obvious before the effective filing date of the claimed invention to a person having
`ordinaryskill in the art to which the claimed invention pertains. Patentabilitys hall notbe
`negated by the manner in which the inventionwas made.
`
`7.
`
`The factual inquiries set forth in Graham v. John Deere 00., 383 US. 1, 148
`
`USPQ 459 (1966), that are applied for establishing a background for determining
`
`obviousness under 35 U.S.C. 103 are summarized as follows:
`
`1. Determining the scope and contents of the prior art.
`
`2. Ascertaining the differences between the prior art and the claims at issue.
`
`3. Resolving the level of ordinary skill in the pertinent art.
`
`4. Considering objective evidence present in the application indicating
`
`obviousness or nonobviousness.
`
`8.
`
`Claims 1, 5, 9, 18-19, 21, and 23 are rejected under 35 U.S.C. 103 as being
`
`unpatentable over Hiza et al (JP 2014-093418A, reference made to attached English
`
`machine translation) and further in view of Kim et al (US 2009/0286347).
`
`Regarding claim 1 Hiza discloses a solar cell, comprising:
`
`an n-type crystalline silicon substrate having atexture provided on a principal
`
`surface thereof (Hiza, Abstract, Fig. 1-1 see: n-type single-crystalline silicon substrate 1
`
`with textured surfaces);
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 4
`
`an i-type amorphous silicon layer located on the principal surface of the
`
`crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: intrinsic amorphous silicon
`
`layer 3);
`
`a p-type amorphous silicon layer located on the i-type amorphous silicon layer
`
`(Hiza, Abstract, Fig. 1-1 see: p-type amorphous silicon layer 4);
`
`a transparent conductive layer located on the p-type amorphous silicon layer
`
`(Hiza, Abstract, Fig. 1-1 see: first transparent electrode layer 5); and
`
`a collector electrode located on the transparent conductive layer (Hiza, Abstract,
`
`Fig. 1-1 see: first collector electrode 6),
`
`wherein the crystalline silicon substrate has an n-type highly-doped region having
`
`an n-type dopant (Hiza, Abstract, Fig. 1-1 see: high concentration impurity doping layer
`
`2 of an n-type dopant), the n-type highly-doped region is located between the i-type
`
`amorphous silicon layer and the crystalline silicon substrate (Hiza, Abstract, Fig. 1-1
`
`see: high concentration impurity doping layer 2 located between layer 3 and substrate
`
`1),
`
`the n-type highly-doped region has a higher dopant concentration than a dopant
`
`concentration in a central part in the thickness direction of the crystalline silicon
`
`substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity doping layer 2 of an
`
`n-type dopant which is a higher concentration than that of the rest of substrate 1),
`
`the p-type amorphous silicon layer is located in direct contact with the i-type
`
`amorphous silicon on the thickness direction of the crystalline silicon substrate (Hiza,
`
`Abstract, Fig. 1-1 see: p-type amorphous silicon layer 4 directly contacting intrinsic
`
`amorphous silicon layer 3),
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 5
`
`the transparent conductive layer is located in direct contact with the p-type
`
`amorphous silicon layer on the thickness direction of the crystalline silicon substrate
`
`(Hiza, Abstract, Fig. 1-1 see: first transparent electrode layer 5 directly contacting p-type
`
`amorphous silicon layer 4), and
`
`the collector electrode is located in direct contact with the transparent conductive
`
`layer on the thickness direction of the crystalline silicon substrate (Hiza, Abstract, Fig. 1-
`
`1 see: first collector electrode 6 directly contacting first transparent electrode layer 5).
`
`Hiza does not explicitly disclose the n-type highly doped region has a larger
`
`thickness of a root part of the texture than a thickness of a peak part thereof.
`
`Kim teaches a solar cell where the thickness of a diffused first conduction-type
`
`highly doped region (Kim, [0069]—[0070] Figs. 10A—1OB and 11 see: boundary layer
`
`1113 of second conductivity type (N-type) dopants) can be increased for the purposes
`
`of reducing electron-hole recombination and thus increase solar cell efficiency (Kim,
`
`[0069]—[0070]).
`
`Kim and modified Hiza are combinable as they are both concerned with the field
`
`of heterojunction solar cells.
`
`It would have been obvious to one having ordinary skill in the art at the time of
`
`the invention to modify the solar cell of Hiza in view of Kim to increase the thickness of
`
`the first n-type highly doped region such that it has a larger thickness of the root part of
`
`the texture than a thickness of the peak part thereof as Kim teaches increasing the
`
`thickness of such highly doped regions can reduce electron-hole recombination and
`
`thus increase solar cell efficiency (Kim, [0069]—[0070]).
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 6
`
`Regarding claims 5 and 21 modified Hiza discloses the solar cell according to
`
`claims 1 and 19, wherein the principal surface is on a light incident surface side, and the
`
`n-type highly-doped region is provided on the light incident surface side of the
`
`crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity
`
`doping layer 2 provided on light incident side of substrate 1).
`
`Regarding claim 9 and 23 modified Hiza discloses the solar cell according to
`
`claim 1, and regarding the claims 9 and 23 limitation “wherein the principal surface is on
`
`a rear surface side, and the n-type highly-doped region is provided on the rear surface
`
`side of the crystalline silicon substrate” the recitation “wherein the principal surface is on
`
`a rear surface side” is directed to an intended use of the claimed solar cell structure.
`
`The n-type highly-doped region of Hiza is provided on the principal surface of the
`
`crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity
`
`doping layer 2 provided on one surface of substrate 1) and this surface can be regarded
`
`as “the rear surface” as this limitation is simply directed to a manner in which the
`
`claimed solar cell is intended to be operated and thus does not differentiate from the
`
`structure of the solar cell of Hiza. See MPEP 2114.
`
`Regarding claim 18 modified Hiza discloses the solar cell according to claim 1,
`
`wherein the crystalline silicon substrate has another principal surface opposite to the
`
`principal surface, and comprises another i-type amorphous silicon layer located on the
`
`other principal surface of the crystalline silicon substrate, and an n-type amorphous
`
`silicon layer located on the other i-type amorphous silicon layer (Hiza, Abstract, Fig. 1-1
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 7
`
`see: intrinsic amorphous silicon layer 7 and n-type amorphous silicon layer 8 on the
`
`opposite surface of substrate 1).
`
`Regarding claim 19 Hiza discloses a solar cell, comprising:
`
`an n-type crystalline silicon substrate having atexture provided on a principal
`
`surface thereof (Hiza, Abstract, Fig. 1-1 see: n-type single-crystalline silicon substrate 1
`
`with textured surfaces);
`
`an i-type amorphous silicon layer located on the principal surface of the
`
`crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: intrinsic amorphous silicon
`
`layer 3);
`
`a p-type amorphous silicon layer located on the i-type amorphous silicon layer
`
`(Hiza, Abstract, Fig. 1-1 see: p-type amorphous silicon layer 4);
`
`a transparent conductive layer located on the p-type amorphous silicon layer
`
`(Hiza, Abstract, Fig. 1-1 see: first transparent electrode layer 5); and
`
`a collector electrode located on the transparent conductive layer (Hiza, Abstract,
`
`Fig. 1-1 see: first collector electrode 6),
`
`wherein the crystalline silicon substrate has an n-type highly-doped region having
`
`an n-type dopant (Hiza, Abstract, Fig. 1-1 see: high concentration impurity doping layer
`
`2 of an n-type dopant), the n-type highly-doped region is located between the i-type
`
`amorphous silicon layer and the crystalline silicon substrate (Hiza, Abstract, Fig. 1-1
`
`see: high concentration impurity doping layer 2 located between layer 3 and substrate
`
`1),
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 8
`
`the n-type highly-doped region has a higher dopant concentration than a dopant
`
`concentration in a central part in the thickness direction of the crystalline silicon
`
`substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity doping layer 2 of an
`
`n-type dopant which is a higher concentration than that of the rest of substrate 1),
`
`the n-type silicon substrate, the i-type amorphous silicon layer, the p-type
`
`amorphous silicon layer and the transparent conductive layer are located in this order in
`
`the thickness direction of the crystalline silicon substrate at the center of the principal
`
`surface of the n-type crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: substrate
`
`1, intrinsic amorphous silicon layer 3, p-type amorphous silicon layer 4, and first
`
`transparent electrode layer 5 are stacked in this order).
`
`Hiza does not explicitly disclose the n-type highly doped region has a larger
`
`thickness of a root part of the texture than a thickness of a peak part thereof.
`
`Kim teaches a solar cell where the thickness of a diffused first conduction-type
`
`highly doped region (Kim, [0069]—[0070] Figs. 10A—1OB and 11 see: boundary layer
`
`1113 of second conductivity type (N-type) dopants) can be increased for the purposes
`
`of reducing electron-hole recombination and thus increase solar cell efficiency (Kim,
`
`[0069]—[0070]).
`
`Kim and modified Hiza are combinable as they are both concerned with the field
`
`of heterojunction solar cells.
`
`It would have been obvious to one having ordinary skill in the art at the time of
`
`the invention to modify the solar cell of Hiza in view of Kim to increase the thickness of
`
`the first n-type highly doped region such that it has a larger thickness of the root part of
`
`the texture than a thickness of the peak part thereof as Kim teaches increasing the
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 9
`
`thickness of such highly doped regions can reduce electron-hole recombination and
`
`thus increase solar cell efficiency (Kim, [0069]-[0070]).
`
`9.
`
`Claims 2, 6, 10, 20, 22, and 24 are rejected under 35 U.S.C. 103 as being
`
`unpatentable over Hiza et al (JP 2014-093418A, reference made to attached English
`
`machine translation) in view of Kim et al (US 2009/0286347) as applied to claims 1, 5,
`
`9, 18-19, 21, and 23 above and in further view of Nakai et al (US 6,207,890).
`
`Regarding claims 2 and 20 modified Hiza discloses the solar cell according to
`
`claims 1 and 19, but Hiza does not explicitly disclose wherein the texture has a larger
`
`radius of curvature of the root part thereof than a radius of curvature of the peak part
`
`thereof.
`
`Nakai teaches a solar cell having a silicon substrate with one or more textured
`
`surfaces where in the texture surfaces the texture has a larger radius of curvature of a
`
`root part thereof than a radius of curvature of a peak part thereof (Nakai, C2/L55-56,
`
`C5/L4-25, Figs. 1-2 and 6-8 see: the bottom ‘b’ of the uneven sections of the n-type
`
`silicon substrate 1 are formed so as to have a curved surface of a larger curvature than
`
`that of the top of the protruded section). Nakai teaches this allows the deposited
`
`amorphous layers over the crystalline substrate to have a uniform thickness as
`
`amorphous layers having a non-uniform thickness can cause degraded output
`
`characteristics of the solar cell (Nakai, C2/L1-25, C5/L15-25).
`
`Nakai and modified Hiza are combinable as they are both concerned with the
`
`field of heterojunction solar cells.
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 10
`
`It would have been obvious to one having ordinary skill in the art at the time of
`
`the invention to modify the solar cell of modified Hiza in view of Nakai such that the
`
`texture surfaces of the substrate of modified Hiza have a larger radius of curvature of a
`
`root part thereof than a radius of curvature of a peak part thereof as taught by Nakai
`
`(Nakai, C2/L55-56, CS/L4-25, Figs. 1-2 and 6-8 see: the bottom ‘b’ of the uneven
`
`sections of the n-type silicon substrate 1 are formed so as to have a curved surface of a
`
`larger curvature than that of the top of the protruded section) because Nakai teaches
`
`this allows the deposited amorphous layers over the crystalline substrate to have a
`
`uniform thickness as amorphous layers having a non-uniform thickness can cause
`
`degraded output characteristics of the solar cell (Nakai, C2/L1-25, CS/L15-25).
`
`Regarding claims 6 and 22 modified Hiza discloses the solar cells according to
`
`claims 2 and 20, wherein the principal surface is on a light incident surface side, and the
`
`n-type highly-doped region is provided on the light incident surface side of the
`
`crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity
`
`doping layer 2 provided on light incident side of substrate 1).
`
`Regarding claims 10 and 24 modified Hiza discloses the solar cells according to
`
`claims 2 and 20, and regarding the claims 10 and 24 limitation “wherein the principal
`
`surface is on a rear surface side, and the n-type highly-doped region is provided on the
`
`rear surface side of the crystalline silicon substrate” the recitation “wherein the principal
`
`surface is on a rear surface side” is directed to an intended use of the claimed solar cell
`
`structure. The n-type highly-doped region of Hiza is provided on the principal surface of
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 11
`
`the crystalline silicon substrate (Hiza, Abstract, Fig. 1-1 see: high concentration impurity
`
`doping layer 2 provided on one surface of substrate 1) and this surface can be regarded
`
`as “the rear surface” as this limitation is simply directed to a manner in which the
`
`claimed solar cell is intended to be operated and thus does not differentiate from the
`
`structure of the solar cell of Hiza. See MPEP 2114.
`
`10.
`
`Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Hiza et al
`
`(JP 2014-093418A, reference made to attached English machine translation) and
`
`further in view of Nakai et al (US 6,207,890) and in further view of Kim et al (US
`
`2009/0286347).
`
`Regarding claim 13 Hiza discloses a method for manufacturing a solar cell,
`
`comprising:
`
`a first step of forming a texture on a principal surface of an n-type crystalline
`
`silicon substrate (Hiza, Fig. 2-1, Page 5 of the translation see: n-type single crystalline
`
`substrate 1 has atexture structure 1a formed on either surface);
`
`a second step of diffusing an n-type dopant on the principal surface of the silicon
`
`substrate having the texture formed thereon so that the principal surface has a n-type
`
`dopant concentration region higher than an n-type dopant concentration in a central part
`
`in the thickness direction of the silicon substrate (Hiza, Fig. 2-2, Page 5 of the
`
`translation see: n-type impurity doping layer 2 formed on texture structure 1a by
`
`diffusing n-type dopants into the surface); and
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 12
`
`a third step of forming an i-type amorphous silicon layer and a p-type amorphous
`
`silicon layer in this order so as to directly overlap the higher n-type dopant concentration
`
`region of the principal surface of the silicon substrate having the texture formed thereon
`
`(Hiza, Fig. 2-3, Page 5 of the translation see: depositing first intrinsic amorphous silicon
`
`layer 3 and p-type amorphous silicon layer 4 sequentially over the first main surface of
`
`the substrate 1), and
`
`in the third step, the Hype amorphous silicon layer and p-type amorphous silicon
`
`layer are formed at the center of the principal surface of the n-type crystalline silicon
`
`substrate (Hiza, Fig. 2-3, Page 5 of the translation see: depositing first intrinsic
`
`amorphous silicon layer 3 and p-type amorphous silicon layer 4 formed over the entire
`
`first main surface of the substrate 1).
`
`Hiza does not explicitly disclose wherein,
`
`in the first step, the texture is formed so
`
`that a root part of the texture has a larger radius of curvature than a radius of curvature
`
`of a peak part thereof, or in the second step, the n-type dopant on the principal surface
`
`of the silicon substrate is diffusing so that the n-type dopant on the principal surface of
`
`the silicon substrate has a larger thickness of the root part of the texture than a
`
`thickness of the peak part thereof.
`
`Nakai teaches a solar cell having a silicon substrate with one or more textured
`
`surfaces where in the texture surfaces the texture has a larger radius of curvature of a
`
`root part thereof than a radius of curvature of a peak part thereof (Nakai, 02/L55-56,
`
`C5/L4-25, Figs. 1-2 and 6-8 see: the bottom ‘b’ of the uneven sections of the n-type
`
`silicon substrate 1 are formed so as to have a curved surface of a larger curvature than
`
`that of the top of the protruded section). Nakai teaches this allows the deposited
`
`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 13
`
`amorphous layers over the crystalline substrate to have a uniform thickness as
`
`amorphous layers having a non-uniform thickness can cause degraded output
`
`characteristics of the solar cell (Nakai, C2/L1-25, CS/L15-25).
`
`Nakai and Hiza are combinable as they are both concerned with the field of
`
`heterojunction solar cells.
`
`It would have been obvious to one having ordinary skill in the art at the time of
`
`the invention to modify the method of manufacturing the solar cell of modified Hiza in
`
`view of Nakai such that in the first step of the method of Hiza, the texture is formed so
`
`that the texture surfaces of the substrate of modified Hiza have a larger radius of
`
`curvature of a root part thereof than a radius of curvature of a peak part thereof as
`
`taught by Nakai (Nakai, C2/L55-56, CS/L4-25, Figs. 1-2 and 6-8 see: the bottom ‘b’ of
`
`the uneven sections of the n-type silicon substrate 1 are formed so as to have a curved
`
`surface of a larger curvature than that of the top of the protruded section) because
`
`Nakai teaches this allows the deposited amorphous layers over the crystalline substrate
`
`to have a uniform thickness as amorphous layers having a non-uniform thickness can
`
`cause degraded output characteristics of the solar cell (Nakai, C2/L1-25, CS/L15-25).
`
`Kim teaches a solar cell where the thickness of a diffused first conduction-type
`
`highly doped region (Kim, [0069]—[0070] Figs. 10A—1OB and 11 see: boundary layer
`
`1113 of second conductivity type (N-type) dopants) can be increased for the purposes
`
`of reducing electron-hole recombination and thus increase solar cell efficiency (Kim,
`
`[0069]—[0070]).
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`Kim and modified Hiza are combinable as they are both concerned with the field
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`of heterojunction solar cells.
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`

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`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 14
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`It would have been obvious to one having ordinary skill in the art at the time of
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`the invention to modify the method of manufacturing the solar cell of Hiza in view of Kim
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`such that in the second step of the method of Hiza to increase the thickness of the first
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`n-type highly doped region such that it has a larger thickness of the root part of the
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`texture than a thickness of the peak part thereof as Kim teaches increasing the
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`thickness of such highly doped regions can reduce electron-hole recombination and
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`thus increase solar cell efficiency (Kim, [0069]—[0070]).
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`Response to Arguments
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`11.
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`Applicant’s arguments with respect to claims 1-2, 5-6, 9-10 13 and 18-24 have
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`been considered but are moot in view of the new grounds of the current rejection.
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`Conclusion
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`12.
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`The prior art made of record and not relied upon is considered pertinent to
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`applicant's disclosure:
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`Adachi et al (WO 2016/052635A1,
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`reference is made to the equivalent English
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`translation US 2017/0200852)
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`in Figs. 1-2 teaches a heterojunction solar cell with a
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`substrate having a textured surface where the texture surfaces of the substrate have a
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`larger radius of curvature of a root part thereof than a radius of curvature of a peak part
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`thereof
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`Tange (JP H08—204214A, with reference made to attached English machine
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`translation) in paras [0015]—[0020] and Fig.
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`1 discloses adding a high concentration n-
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`

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`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 15
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`type impurity layer 20 between an n-type substrate 10 and p-type emitter 12 to produce
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`a solar cell with low recombination that maintains high output voltage.
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`13.
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`Applicant's amendment necessitated the new ground(s) of rejection presented in
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`this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP
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`§ 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37
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`CFR1.136(a).
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`A shortened statutory period for reply to this final action is set to expire THREE
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`MONTHS from the mailing date of this action.
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`In the event a first reply is filed within
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`TWO MONTHS of the mailing date of this final action and the advisory action is not
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`mailed until after the end of the THREE-MONTH shortened statutory period, then the
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`shortened statutory period will expire on the date the advisory action is mailed, and any
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`extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of
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`the advisory action.
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`In no event, however, will the statutory period for reply expire later
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`than SIX MONTHS from the date of this final action.
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`14.
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to ANDREW J GOLDEN whose telephone number is
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`(571)270-7935. The examiner can normally be reached on 11am-8pm.
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`Examiner interviews are available via telephone, in-person, and video
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`conferencing using a USPTO supplied web-based collaboration tool. To schedule an
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`interview, applicant is encouraged to use the USPTO Automated Interview Request
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`(AIR) at http://www.uspto.gov/interviewpractice.
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`

`

`Application/Control Number: 15/657,987
`Art Unit: 1726
`
`Page 16
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Jeffrey Barton can be reached on 571-272—1307. The fax phone number for
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`the organization where this application or proceeding is assigned is 571-273-8300.
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`Information regarding the status of an application may be obtained from the
`
`Patent Application Information Retrieval (PAIR) system. Status information for
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`published applications may be obtained from either Private PAIR or Public PAIR.
`
`Status information for unpublished applications is available through Private PAIR only.
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`For more information about the PAIR system, see https://ppair-
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`my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private
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`PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
`
`If you would like assistance from a USPTO Customer Service Representative or access
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`to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-
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`272-1000.
`
`ANDREW J. GOLDEN
`
`Primary Examiner
`Art Unit 1726
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`/ANDREW J GOLDEN/
`
`Primary Examiner, Art Unit 1726
`
`