(12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY(PCT)
`(19) World Intellectual Property
`Organization
`International Bureau
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`=\
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`\
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`(43) International Publication Date
`13 April 2017 (13.04.2017) WIPO LPCT
`
`(10) International Publication Number
`WO 2017/062886 Al
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`Agent: GUSEV, Vladimir Y.; Kwan & Olynick LLP,
`2000 Hearst Avenue, Ste 305, Berkeley, CA 94709 (US).
`
`Designated States (unless otherwise indicated, for every
`kind of national protection available): AE, AG, AL, AM,
`AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY,
`BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM,
`DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT,
`HN, HR, HU,ID,IL,IN,IR, IS, JP, KE, KG, KN, KP, KR,
`KW,KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME,
`MG, MK, MN, MW, MX, MY, MZ, NA, NG, NL NO, NZ,
`OM,PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA,
`SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM,
`TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM,
`ZW.
`
`GY)
`
`International Patent Classification:
`HOIR 9/16 (2006.01)
`HOIR 13/68 (2011.01)
`HOIR 4/58 (2006.01)
`HOIM 2/20 (2006.01)
`
`(72)
`
`Inventors: COAKLEY, Kevin, Michael; 3509 Edison
`Way, Menlo Park, CA 94025 (US). BROWN, Malcolm;
`3509 Edison Way, Menlo Park, CA 94025 (US). TSOA,
`Paul; 3509 Edison Way, Menlo Park, CA 94025 (US).
`
`@2)
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`International Application Number:
`
`(22)
`
`InternationalFiling Date:
`
`PCT/US2016/056154
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`(74)
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`7 October 2016 (07.10.2016)
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`(81)
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`(25)
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`(26)
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`(30)
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`(T)
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`Filing Language:
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`Publication Language:
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`English
`
`English
`
`Priority Data:
`62/238,827
`62/263,076
`
`8 October 2015 (08.10.2015)
`4 December 2015 (04.12.2015)
`
`US
`US
`
`Applicant: CELLINK CORPORATION [US/US]; 3509
`Edison Way, Mcnlo Park, CA 94025 (US).
`
`(84)
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`Designated States (unless otherwise indicated, for every
`kind of regional protection available): ARIPO (BW, GH,
`
`[Continued on next page]
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`(57) Abstract: Provided are interconnects for interconnect-
`ing a set of battery cells, assemblies comprising these inter-
`connects, methods of forming such interconnects, and meth-
`ods of forming such assemblies. An interconnect includes a
`conductor comprising two portions electrically isolated from
`each other, At least one portion may include two contacts for
`connecting to battery cells and a fuse forming anelectrical
`connection between these two contacts. The interconnect
`may also include an insulator adhered to the conductor and
`mechanically supporting the two portions of the conductor.
`The insulator may include an opening such that the fuse
`overlaps with this opening, and the opening does not inter-
`fere with operation of the fuse. In some embodiments, the
`fuse may notdirectly interface with any other structures. Fur-
`thermore, the interconnect mayinclude a temporary substrate
`adhered to the insulator such that the insulator is disposed
`between the temporary substrate and the conductor.
`
`(54)
`
`Title: BATTERY INTERCONNECTS
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`2100
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`“
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`A-A Cross Section
`from FIG. 25A
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`WO2017/062886A1[MIMITEAMINGTTAIA
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`

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`WO 2017/062886 AImMUMIIMINTIMIMM IAM TATA A AATTM
`
`GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ,
`TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU,
`;
`TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE,
`DK, KE, ES, Fl, FR, GB, GR, HR, HU, IK,IS, IT, LT, Published:
`LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, —__with international search report (Art. 21(3))
`
`SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CL CM, GA,
`GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG).
`
`

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`WO 2017/062886
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`PCT/US2016/056154
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`BATTERY INTERCONNECTS
`
`CROSS-REFERENCE TO RELATED APPLICATIONS
`
`[0001] This application claims the benefit under 35 U.S.C. § 119(e) of US
`
`Provisional Patent Application 62/238 ,827, entitled: “BATTERY
`
`INTERCONNECTS?” filed on 10/08/2015 (Attorney Docket No. CLELNKP00O7PUS)
`
`and US Provisional Patent Application 62/263,076, entitled: “BATTERY
`
`INTERCONNECTS?” filed on 12/04/2015 (Attorney Docket No. CLNKPOO7P1US).
`
`10
`
`BACKGROUND
`
`[0002] Rechargeable batteries represent a promising technology for providing
`
`15
`
`energy storage for mobile and stationary applications. In order for the market
`
`penetration of this technologyto increase,the cost of battcry cells and battcry packs
`
`must be decreased. While the battery cells (e.g., lithium-ion cells) have traditionally
`
`been and probablystill are the most expensive components in battery packs, the cost
`
`of the battery cells is expected to decrease over time with economies of scale, new
`
`20
`
`materials, and design improvements. Furthermore, the performance and lifetime of
`
`the battery cells is expected to increase, leading to new high-durability applications
`
`needing robust connections and conductors. This trend will place more emphasis on
`
`the cost, performance, and reliability of other components in battery packs, such as
`
`battery interconnects, as well as efficient methods of assembling battery packs using
`
`25
`
`these components.
`
`[0003] The clectrical interconnects and battery monitoring systems (BMS) in
`
`battery packs are two areas in which performance and componentcosts will be
`
`focused on. Many conventional battery packs are assembled using bulky metal
`
`plates with complex features. These metal plates are used for interconnecting
`
`30
`
`individual battery cells in packs and to carry current among these cells and/or
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`terminals of the packs. The plates are frequently wired to the individual cells using
`
`separate fuse or connector wires, which are designedto protect the individual cells
`
`against over-currents and thermal runaway. These fuse wires are fragile and are
`
`prone to breakage underthe stress and vibration conditions typically encountered in
`
`the field. Furthermore, each plate is typically attached to the cells as a freestanding
`
`component. This individualized assembly drives up costs and the overall complexity
`
`of manufacturing the pack, which in turn negatively impacts safety and robust
`
`performanceof the battery packs.
`
`10
`
`SUMMARY
`
`[0004] Provided are interconnects for interconnecting a set of battery cells (e.g., in
`
`battery packs), assemblies comprising these interconnects, methods of forming such
`
`interconnects, and methods of forming such assemblies using the interconnects. An
`
`15
`
`interconnect includes a conductor comprising two or more portionselectrically
`
`isolated from each other. At least one of these portions may optionally include two
`
`contacts for connecting to battery cells and a fuse forming an electrical connection
`
`between these two contacts. The interconnect may also include an insulator adhered
`
`to the conductor and mechanically supporting the two portions of the conductor.
`
`20
`
`The insulator may include an opening such that the fuse overlaps with this opening,
`
`and the opening does not interfere with operation ofthe fuse (e.g., its thermal
`
`characteristics). In some embodiments, the fuse may not directly interface with any
`
`other structures thereby allowing for a more controlled operation ofthe fuse.
`
`Furthermore, the interconnect may include a temporary substrate adhered to the
`
`25
`
`insulator such that the insulator is disposed between the temporary substrate and the
`
`conductor. The temporary substrate may be adhered to the contacts of the conductor
`
`through openingsin the insulator and provide mechanical support to these contacts
`
`at least until the interconnect is used for interconnecting the battery cells, after
`
`which the temporary substrate is removed.
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`[0005] In some embodiments, an interconnect, used for interconnecting a set of
`
`batlery cells comprises a conductor and a first insulator. The conductor comprises a
`
`first portion and a second portion electrically isolated from the first portion. The
`
`first portion optionally comprisesa first contact, a second contact, and a fuse
`
`forming electrical connection between the first contact and the second contact. The
`
`first insulator is adhered to the conductor and mechanically supports the first portion
`
`and the second portion of the conductor. Thefirst insulator optionally comprises a
`
`first opening such that the fuse overlaps with the first opening. In some
`
`embodiments, the fuse fully overlaps with the first opening.
`
`10
`
`[0006] In some embodiments, the first contact partially overlaps with thefirst
`
`opening. The portion of the first contact may adhere to and be supported bythefirst
`
`insulator. The first insulator may comprise a second opening partially overlapping
`
`with the second contact. The portion of the second contact may adhere to and be
`
`supported by the first insulator.
`
`15
`
`[0007] In some embodiments, the second portion optionally comprises a first
`
`contact, a second contact, and a fuse forming electrical connection betweenthefirst
`
`contact of the second portion and the second contact of the second portion. The fuse
`
`of the second portion may be substantially the samcas the fuse ofthe first portion.
`
`The fuse of the second portion may overlap with an additional openingin thefirst
`
`20
`
`insulator.
`
`[0008] In some embodiments, the interconnect further comprises a second insulator
`
`adhered to the conductor and further mechanically supporting the first portion and
`
`the second portion of the conductor. The second insulator optionally compriscs a
`
`first opening such that the fuse overlaps with the first opening. The first opening of
`
`25
`
`the second insulator may overlap or even coincide with the first opening ofthe first
`
`insulator.
`
`In some embodiments, every opening of the second insulator coincides
`
`with a corresponding opening ofthe first insulator.
`
`[0009] In some embodiments, the cross-sectional profile of the fuse with a plane
`
`normalto a principal axis of the fuse is substantially rectangular. Specifically, the
`
`30
`
`angles between the top or bottom surfaces and side walls of the fuse may be
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`between about 75° and 105°. The side walls may be substantially parallel to each
`
`other(e.g., deviating less than 15° from being absolutely parallel). In some
`
`embodiments, the surfaces and sidewalls of the fuse are exposed.
`
`[0010] In some embodiments, the conductor comprises aluminum or, more
`
`specifically, the conductor consists essentially (e.g., greater than 95 atomic %) of
`
`aluminum. The conductor may comprise a surface coating overlapping with the
`
`first insulator. In some embodiments, a side of the conductor opposite of thefirst
`
`insulator is exposed.
`
`[0011] In some embodiments, the interconnect further comprises a temporary
`
`10
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`substrate adhered to the first insulator such that the first insulator is disposed
`
`between the temporary substrate and the conductor. The temporary substrate is
`
`adhered to the first contact and the second contact of the conductor and
`
`mechanically supports the first contact and the second contact. In some
`
`embodiments, the temporary substrate comprises a first opening overlapping with
`
`15
`
`the first contact and the second opening overlapping with the second contact. The
`
`surface of the first contact and the surface of the second contact of the conductor
`
`opposite of the temporary substrate may be fully exposed.
`
`[0012] Also provided is an assembly comprising a set of battery cells and an
`
`interconnect. The interconnect comprises a conductor anda first insulator. The
`
`20
`
`conductor comprises a first portion and a second portion electrically isolated from
`
`the first portion. The first portion optionally comprises a first contact, a second
`
`contact, and a fuse forming electrical connection between the first contact and the
`
`second contact. The first contact may be connccted to a first terminal of a second
`
`battery of the set of battery cells. The second contact may be connected to a second
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`25
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`terminal of a first battery of the set of battery. cells. The first insulator is adhered to
`
`the conductor and mechanically supports the first portion and the second portion of
`
`the conductor. The first insulator may comprise a first opening such that the fuse
`
`overlaps with the first opening.
`
`[0013] In some embodiments, the first insulator is disposed between the conductor
`
`30
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`and the set of battery cells. The first insulator may be adhered to the set of battery
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`cells. The first contact may be connected to the first terminal of the second battery
`
`of the set of battery cells through the first opening in the first insulator. The second
`
`contact may be connected to the second terminalofthe first battery of the set of
`
`battery cells through a first opening in the first insulator. The fuse may extend over
`
`a space between battery cells of the set and does not overlap with any ofthe battery
`
`cells of the set.
`
`[0014] Also provided is a method of forming an assembly. The method comprises
`
`positioning an interconnect overa set of battery cells. The interconnect comprises a
`
`conductor, a first insulator adhered to the conductor, and a temporary substrate
`
`10
`
`adheredto the first insulator such that the first insulator is disposed between the
`
`conductor and the temporary substrate. The conductor comprises a first portion and
`
`a second portion electrically isolated from the first portion. The first portion
`
`optionally comprisesa first contact, a second contact, and a fuse formingelectrical
`
`connection between the first contact and the second contact. The first contact and
`
`15
`
`the second contact are adhered to the temporary substrate through the openings in
`
`the first insulator. The method proceeds with electrically coupling the first contact
`
`and the second contact to the set of battery cells. The first contact and the second
`
`contact may be separated from the temporary substrate while coupling thefirst
`
`contact and the second contact to the set of battery cells. The method also involves
`
`20
`
`removing the temporary substrate from thefirst insulator.
`
`[0015] In some embodiments,the set of battery cells mechanically supports thefirst
`
`contact and the second contact after electrically coupling the first contact and the
`
`second contactto the set of battery cells. Electrically coupling the first contact and
`
`the second contactto the set of battery cells may be performed through openings in
`
`25
`
`the temporary substrate.
`
`[0016] These and other embodiments are described further below with reference to
`
`the figures.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
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`[0017] FIG. 1A is a schematic illustration of battery cells arranged intoaset, in
`
`accordance with some embodiments.
`
`[0018] FIG. 1B is a schematic illustration of an insulating layer of an interconnect
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`circuit, in accordance with some embodiments.
`
`[0019] FIG. 1C is a hypothetical example of the insulating layer of FIG. 1B
`
`disposed overthe set of the battery cells of FIG. 1A, in accordance with some
`
`embodiments.
`
`[0020] FIG. 1D is a hypothetical example of a conductive layer (or a conductor), in
`
`accordance with some embodiments.
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`10
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`[0021] FIG. 1E is a schematic illustration of an interconnectcircuit showing the
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`conductive layer of FIG. 1D disposed overthe insulating layer of FIG. 1B, in
`
`accordance with some embodiments.
`
`[0022] FIG. 1F is a side schematic view of a battery pack assembly including
`
`battcry cclls arranged into a set and two interconnect circuits connected to the
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`15
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`battery cells, in accordance with some embodiments.
`
`[0023] FIG. 1G is a schematic representation of another example of a battery pack
`
`assembly including twosets of battery cells interconnected using interconnect
`
`circuit, in accordance with some embodiments.
`
`[0024] FIG. 2A is a schematic representation of a portion of an insulating layer
`
`20
`
`having an insulating layer opening anda slot partially surrounding the insulating
`
`layer opening, in accordance with some embodiments.
`
`[0025] FIG. 2B is a schematic representation of a portion of a conductive layer
`
`having a contact pad, in accordance with some embodiments.
`
`[0026] FIG. 2C is a schematic representation of a portion of an interconnect circuit
`
`25
`
`having the conductive layer of FIG. 1B and the insulating layer of FIG. 1A, in
`
`accordance with some embodiments.
`
`[0027] FIG. 2D is a schematic representation of another example the interconnect
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`circuit having the conductive layer of FIG. 1B and an insulating layer having a set of
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`slits, in accordance with some embodiments.
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`[0028] FIG.2Eis a partial cross-sectional view of a fusible link supported by an
`
`insulating layer, in accordance with some embodiments.
`
`[0029] FIG. 2F is a schematic representation of an interconnect circuit during a
`
`fabrication stage with a slot tab separating two portions ofthe slot in the insulating
`
`layer, in accordance with some embodiments.
`
`[0030] FIG. 2G is a schematic representation of the interconnect circuit of FIG. 2F
`
`at a later fabrication stage with the slot tab removed, in accordance with some
`
`embodiments.
`
`[0031] FIG. 2H is a schematic cross-sectional side view of the interconnect circuit
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`10
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`of FIG. 2G illustrating an additional freedom for moving the contact pad, in
`
`accordance with some embodiments.
`
`[0032] FIG. 3A is a schematic representation of one example of an interconnect
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`circuit including voltage monitoring traces, in accordance with some embodiments.
`
`[0033] FIG. 3B is a schematic representation of another example of an interconnect
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`15
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`circuit including voltage monitoring traces, in accordance with some embodiments.
`
`[0034] FIGS. 4A-4C are cross-sectional schematic representations of a battery pack
`
`including a housing, an interconnectcircuit, and battery cells, in accordance with
`
`some embodiments.
`
`[0035] FIGS. 4D-4E are schematic exploded views of battery packs including
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`20
`
`different types of heat sinks, in accordance with some embodiments.
`
`[0036] FIG. 5A is a plan-view schematic diagram ofa set of prismatic battery cells
`
`arranged into a linear array, in accordance with some embodiments.
`
`[0037] FIG. 5B is a plan-view schematic diagram of the set of prismatic battery
`
`cells of FIG. 5A further illustrating an interconnectcircuit disposed overthe cells, in
`
`25
`
`accordance with some embodiments.
`
`[0038] FIG. 5C is a plan-view schematic diagram of the set of prismatic battery
`
`cells of FIG. 5A further illustrating another interconnect circuit having voltage
`
`monitoring traces, in accordance with some embodiments.
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`[0039] FIG. 5D is a plan-view schematic diagram of an interconnectcircuit
`
`including four rows ofislands (conductor portions) and voltage traces, in accordance
`
`with some embodiments.
`
`[0040] FIG. 5E is a plan-view schematic diagram ofthe set of prismatic battery
`
`cells of FIG. 5A further illustrating yet another interconnect circuit having voltage
`
`monitoring traces, in accordance with some embodiments.
`
`[0041] FIGS. 5F and 5G are side-view schematic diagramsof adjacent battery cells
`
`interconnected using interconnects, in accordance with some embodiments.
`
`[0042] FIG. 6A is a plan-view schematic diagram of a set of prismatic battery cells
`
`10
`
`arranged into a linear array, in accordance with some embodiments.
`
`[0043] FIG. 6B is a plan-view schematic diagram ofthe set of prismatic battery
`
`cells of FIG. 6A furtherillustrating an interconnect circuit disposed overthe cells, in
`
`accordance with some embodiments.
`
`[0044] FIG. 6C is a plan-vicw schematic diagram of another interconnect circuit
`
`15
`
`having voltage monitoring traces, in accordance with some embodiments.
`
`[0045] FIG. 6D is a plan-view schematic diagram of a stacked flexible circuit over
`
`an interconnectcircuit, in accordance with some embodiments.
`
`[0046] FIG. 7A is a side-view schematic diagramof an interconnect circuit
`
`including a slot with a battery terminal protruding throughthe slot for making an
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`20
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`electrical connection to the opposite side of the interconnectcircuit, in accordance
`
`with some embodiments.
`
`[0047] FIG. 7B is a plan-view schematic diagram of the interconnectcircuit and the
`
`battery terminal of FIG. 7A, in accordance with some embodiments.
`
`[0048] FIG. 7C is a side-view schematic diagram of another interconnect circuit
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`25
`
`with a conductor folding around a battery terminal for making an electrical
`
`connection between the two, in accordance with some embodiments.
`
`[0049] FIG. 7D is a side-view schematic diagram of another interconnectcircuit
`
`with a conductor forming an electrical connection to a battery terminal, in
`
`accordance with some embodiments.
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`[0050] FIG. 7E is a schematic diagram of anotherinterconnect circuit having a
`
`voltage trace assembly and a conductor assembly, in accordance with some
`
`embodiments.
`
`[0051] FIG. 7F is a schematic exploded view of the conductor assembly ofthe
`
`interconnect circuit in FIG. 7E, in accordance with some embodiments.
`
`[0052] FIG. 7G is a schematic exploded view of the voltage trace assembly of the
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`interconnect circuit in FIG. 7E, in accordance with some embodiments.
`
`[0053] FIG. 8A is a plan-view schematic diagram illustrating a set of battery cells
`
`arranged into two columns, in accordance with some embodiments.
`
`10
`
`[0054] FIG. 8B is a plan-view schematic diagram illustrating an insulating layer
`
`disposed overthe set of battery cells of FIG. 8A, in accordance with some
`
`embodiments.
`
`[0055] FIG. 8C is a plan-view schematic diagram illustrating an interconnecting
`
`circuit comprising a conductor and an insulating layer, in accordance with some
`
`15
`
`embodiments.
`
`[0056] FIG. 8D is a plan-view schematic diagram illustrating another
`
`interconnecting circuit comprising a conductor and an insulating layer, in
`
`accordance with some embodiments.
`
`[0057] FIG.8E is a side-view schematic diagram illustrating multiple interconnect
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`20
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`circuits and battery cells connected to these circuits, both of which stacked in a
`
`direction perpendicular to the planes of interconnectcircuits, in accordance with
`
`some embodiments.
`
`[0058] FIG. 8F is a side-view schematic diagram illustrating a single interconnect
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`circuit looping throughouta stack of battery cells disposed at multiple levels and
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`25
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`connected to these circuits, in accordance with some embodiments.
`
`[0059] FIG. 8G is a plan-view schematic diagram illustrating patterns of different
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`components of an interconnect circuit in the vicinity of two terminals having
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`different polarities, in accordance with some embodiments.
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`[0060] FIG. 8H is an exploded perspective view illustrating a battery pack
`
`comprising an interconnect circuil and battery cells having a substantially flat form
`
`factor, in accordance with some embodiments.
`
`[0061] FIG. 9 is a process flowchart corresponding to a method of forming an
`
`interconnectcircuit for interconnecting battery cells in a battery pack, in accordance
`
`with some embodiments.
`
`[0062] FIGS. 10A-10C are schematic representations of different examples of a
`
`conductor.
`
`[0063] FIG. 11A is a schematic representation of a portion of a conductive layer
`
`10
`
`having a contact pad, in accordance with some embodiments.
`
`[0064] FIG. 11B is a schematic representation of a portion of a support layer having
`
`openings, in accordance with some embodiments.
`
`[0065] FIG. 11C is a schematic representation of a portion of an interconnectcircuit
`
`having the conductive layer of FIG. 11A and the support layer of FIG. 11B, in
`
`15
`
`accordance with some embodiments.
`
`[0066] FIG. 11D is a schematic representation of a portion of a conductive layer
`
`having a contact pad, in accordance with some embodiments.
`
`[0067] FIG. 11E is a schematic representation of a portion of a support layer having
`
`no opening, in accordance with some embodiments.
`
`20
`
`[0068] FIG. 11F is a schematic representation of a portion of an interconnectcircuit
`
`having the conductive layer of FIG. 11D and the support layer of FIG. 11E, in
`
`accordance with some embodiments.
`
`[0069] FIGS. 12A and 12B illustrate two examples of an interconnectcircuit after
`
`the connecting tab removal operation.
`
`25
`
`[0070] FIG. 13A illustrates a top schematic view of an example of a second
`
`insulating layer prior to laminating this insulating layer to a conductive layer.
`
`[0071] FIG. 13B illustrates a top schematic view of an example of a second
`
`insulating layer after to laminating this layer to a conductive layer.
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`10
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`[0072] FIG. 14 illustrates a side cross-sectional schematic view of an interconnect
`
`circuit having two insulating layers and a conductive layer disposed between these
`
`insulating layers.
`
`[0073] FIGS. 15-17 are side-view schematic diagramsillustrating different
`
`examples of interconnects having different arrangements of one or more insulating
`
`layers and openings in these insulating layers, in accordance with some
`
`embodiments.
`
`[0074] FIGS. 18-20 are side-view schematic diagramsillustrating different
`
`examples of interconnects having different positions of conductor’s surface
`
`10
`
`sublayersrelative to insulators, in accordance with some embodiments.
`
`[0075] FIG. 21A is an expanded schematic view of an interconnect, in accordance
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`with some embodiments.
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`[0076] FIGS. 21A-21D are side-view schematic diagramsillustrating different
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`insulator examples for interconnects, in accordance with some embodiments.
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`[0077] FIG. 22Aillustrates battery cells forming a battery set, in accordance with
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`some embodiments.
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`[0078] FIG. 22B illustrates an insulator (shown as a standalone component), in
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`accordance with some embodiments.
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`[0079] FIG. 23Aillustrates a hypothetical orientation of an insulator of a
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`interconnect(the insulatorstill shown as a standalone component)relative to the
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`battery cell set of FIG. 22A, in accordance with some embodiments.
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`[0080] FIG. 23B illustrates a conductor (shownas a standalone component), in
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`accordance with some embodiments.
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`[0081] FIG. 24A illustrates a stack of first insulator and a conductor disposed over
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`the battery cell set, in accordance with some embodiments.
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`[0082] FIG. 24B illustrates an additional insulator (shownas a standalone
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`component), in accordance with some embodiments.
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`[0083] FIG. 25A illustrates a stack of a first insulator, a conductor, and a second
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`insulator disposed overthe battery cell set, in accordance with some embodiments.
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`[0084] FIG. 25B is an expanded view of a portion of the assembly of FIG. 25A
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`illustrating an insulator openingrelative to a fuse of the conductor, in accordance
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`with some embodiments.
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`[00835] FIG. 25C is a cross-sectional view of the assembly portion of FIG. 25B
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`illustrating position of the fuse relative to other components, in accordance with
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`some embodiments.
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`[0086] FIGS. 25D-25F are cross-sectional views of different examples the fuse, in
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`accordance with some embodiments.
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`[0087] FIG. 26 is a cross-sectional side view of the assembly of FIG. 25A,in
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`accordance with some embodiments.
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`[0088] FIG. 27A illustrates an example of an insulator having openings, in
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`accordance with some embodiments.
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`[0089] FIG. 27B illustrates an example of a conductor having fuses, in accordance
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`with some embodiments.
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`[0090] FIG. 27C illustrates an example of a stack of the conductorand the insulator,
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`in accordance with some embodiments.
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`[0091] FIG. 27D illustrates an example of a temporary substrate having openings
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`for accessing the conductor during installation of the interconnector, in accordance
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`with some embodiments.
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`[0092] FIGS. 27E and 27F illustrate an example of the interconnect in which the
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`temporary substrate of FIG. 27D is laminated to the insulator such that the insulator
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`is disposed between the conductor and the temporary substrate, in accordance with
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`some embodiments.
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`[0093] FIGS. 28A-28C illustrates an interconnect at different stages of forming an
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`electrical connection to a battery cell, in accordance with some embodiments.
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`DETAILED DESCRIPTION
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`[0094] The ensuing detailed description of embodiments of this disclosure will be
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`better understood when read in conjunction with the appended drawings. As used
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`herein, an element or step recited in the singular and proceeded with the word “a” or
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`“an” should be understood as not excluding plural of said elements or steps, unless
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`such exclusion is explicitly stated. Furthermore, references to “one embodiment”
`
`are not intended to be interpreted as excluding the existence of additional
`
`embodiments that also incorporate the recited features. Moreover, unless explicitly
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`stated to the contrary, embodiments “comprising” or “having” an elementor a
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`plurality of elements having a particular property may include additional elements
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`not having that property.
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`Introduction
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`[0095] Many modern battcry packs include multiple cells that necd to be
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`interconnected. For example, the Model S (manufactured by Tesla Corporation in
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`Palo Alto, CA) has thousands of cylindrical battery cells (e.g., 18650 cells). The
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`success of many battery applications often depends on robust, reliable, and
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`inexpensive interconnects between battery cells in such packs. Some interconnects
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`use rigid metal plates connected to cell terminals and that extend across multiple
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`battery cells. While these plates can transmit large currents and can be used for
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`mechanical support, these plates can be expensive to manufacture and to connectto
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`the battery cell terminals. Furthermore, the rigidity of these plates may often
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`interfere with relative motion between the battery cells and plates, potentially
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`resulting in the loss of electrical connections between these components.
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`[0096] Flexible interconnect circuits can provide morereliable electrical
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`connections and, in some cases, may be easier to manufacture, connectto cell
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`terminals, and fit into battery packs. The flexible circuits may also provide
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`electrical current fusing functionality as further described below. Yet, some flexible
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`circuits have other limitations. For example, printed circuits are generally limited to
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`low current applications because of small conductive layer thicknesses. In these
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`circuits, the thickness of conductive elements is limited by mask-and-etch
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`capabilities, which are generally not suitable for high aspect ratio features and thick
`
`conductors. Furthermore, the prolonged etching neededfor thicker layers drives up
`
`the production cost of the flexible circuit. At the same time, many modern battery
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`cells and packs are capable of operating at currents on the order of 10-200A, such as
`
`during a rapid charge or a rapid discharge. This, in turn, necessitates the use of
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`thick conductive layers (e.g., a thickness of between 70 -1000 micrometers) to
`
`provide sufficient conductivity.
`
`[0097] In addition, the extra conductor thickness (required to carry large currents)
`
`makes it difficult to form fuses or fusible links from these conductors with
`
`controlled cross-sectional areas. A fusible link may be usedto break the electrical
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`15
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`connection to a battery cell when the current through the link exceeds a certain
`
`threshold controlled, in part, by the dimensionsof this fusible link. When forming a
`
`fusible link by etching a thick conductor, it may be difficult to mask and etch a
`
`controlled narrow trace and maintain a uniform width of the fuse (the width being
`
`measured within a principal plane of conductor). For etching, the minimum width-
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`20
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`to-thickness ratio (which maybereferred to an aspectratio) is typically four or even
`
`five, to avoid excessive undercutting associated with etching. For example, when a
`
`140-micrometer thick conductive layer is used to form fusible links using etching,
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`the resulting width of about 560-700 micrometers may be excessive for some fusing
`
`applications. Furthermore, forming a fusible link that does not contact any other
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`components is generally not possible with etching sine the back side has to be
`
`protected from etchant. At the same time, any physical contact with the fusible link
`
`(other than with remaining portions of the conductor) is not desirable and interferes
`
`with thermal characteristics of the fusible link.
`
`[0098] Interconnects described herein address various deficiencies of conventional
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`interconnects described above.
`
`In some embodiments, an interconnect, described
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`herein, includes a conductor and one or more insulators. For purposesofthis
`
`disclosure, the term “interconnect” is used interchangeably with “interconnect
`
`circuit”, “conductor” with “conductive layer’, and “insulator” with an “insulating
`
`layer.” One or both insulators may have openings for coupling the conductor