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`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and TrademarkOffice
`Address; COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`16/962,556
`
`07/16/2020
`
`Nanako Hirashita
`
`P200674US00
`
`8363
`
`WESTERMAN, HATTORI, DANIELS & ADRIAN, LLP
`8500 LEESBURG PIKE
`SUITE 7500
`TYSONS, VA 22182
`
`YECHURI, SITARAMARAO §
`
`ART UNIT
`2818
`
`PAPER NUMBER
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`09/14/2021
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`
`patentmail @ whda.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Disposition of Claims*
`1-20 is/are pending in the application.
`)
`Claim(s)
`5a) Of the above claim(s) ___ is/are withdrawn from consideration.
`(1) Claim(s)__ is/are allowed.
`Claim(s) 1-5,9-12,14 and 17-20 is/are rejected.
`Claim(s) 6-8,13 and 15-16 is/are objected to.
`O Claim(s)
`are subjectto restriction and/or election requirement
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http:/Awww.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`) ) ) )
`
`Application Papers
`10)() The specification is objected to by the Examiner.
`11)) The drawing(s) filed on 7/16/2020 is/are: a)(¥) accepted or b)C) objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`12) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d)or (f).
`Certified copies:
`cc) None ofthe:
`b)L) Some**
`a)¥) All
`1.4) Certified copies of the priority documents have been received.
`2.1) Certified copies of the priority documents have beenreceived in Application No.
`3.2.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`* See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1)
`
`Notice of References Cited (PTO-892)
`
`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date 7/16/2020.
`U.S. Patent and Trademark Office
`
`3) (J Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`(Qj Other:
`
`4)
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20210908
`
`Application No.
`Applicant(s)
`16/962 556
`Hirashita etal.
`
`Office Action Summary Art Unit|AIA (FITF) StatusExaminer
`SITARAMARAO S YECHURI
`2818
`Yes
`
`
`
`-- The MAILING DATEofthis communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133}.
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`1)C) Responsive to communication(s) filed on
`C) A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`
`2a)C) This action is FINAL. 2b)¥)This action is non-final.
`3)0) An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
`4\() Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 2
`
`Notice of Pre-AlA or AIA Status
`
`The present application, filed on or after March 16, 2013, is being examined under the first
`
`inventor to file provisions of the AIA.
`
`Allowable Subject Matter
`
`1.
`
`Claim 6-8, 13, 15, 16 objected to as being dependent upon a rejected base claim, but would be
`
`allowable if rewritten in independent form includingall of the limitations of the base claim and any
`
`intervening claims.
`
`Claim Rejections - 35 USC § 103
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections
`
`set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is
`not identically disclosed as set forth in section 102, if the differences between the claimed invention
`and the prior art are such that the claimed invention as a whole would have been obvious before the
`effective filing date of the claimed invention to a person having ordinaryskill in the art to which the
`claimed invention pertains. Patentability shall not be negated by the manner in which the invention
`was made.
`
`The factual inquiries for establishing a background for determining obviousness under 35 U.S.C.
`
`103 are summarized as follows:
`
`1. Determining the scope and contentsofthe prior art.
`
`2. Ascertaining the differences between the prior art and the claims at issue.
`
`3. Resolving the level of ordinary skill in the pertinent art.
`
`4. Considering objective evidence present in the application indicating obviousness or
`
`nonobviousness.
`
`2.
`
`Claim 1, 10, 18, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kazuyuki etal.
`
`(JP 2000101105 A) hereafter referred to as Kazuyuki
`
`In regard to claim 1 Kazuyuki teaches a semiconductor light receiving element [see Fig. 1b],
`
`comprising:
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 3
`
`a substrate [includes “GaN-based crystal layer 4” and “substrate 5”];
`
`a semiconductor layer[“light-receiving layer 1” “The carrier concentration of the light receiving
`
`layer is about 1 x 10 .sup.13 cm .sup.-3 to 1 x 10 .sup.17 cm .sup.-3” “When the light receiving layer is a
`
`p-type low concentration layer, Au (thickness: 50 nm) / Niis used as a transparent electrode. (Thickness:
`
`100 nm), and the opaque electrode includes Au (thickness: 500 nm / Ni (thickness: 100 nm). Here, when
`
`the carrier concentration is low, there is a practical problem that ohmic contact becomesdifficult to
`
`obtain. To solve this problem, a layer for making an ohmic contact (called an ohmic contact layer) has a
`
`free electron (or hole) concentration of 1 x 10 .sup.18 cm .sup.-3 and a thickness of 10 nm. It is
`
`preferable to insert a layer of about 50 nm between the light receiving layer and the electrode” ] of a
`
`direct transition type [“wavelength range of the light to be received is determined by the band gap of
`
`the GaN-based crystal used for the light-receiving layer”] on the substrate;
`
`a p-type semiconductor layer [“ohmic contact (called an ohmic contact layer) has a free electron
`
`(or hole) concentration”] on at least part of the semiconductor layer;
`
`a first electrode [“ohmic electrode 2” makeselectrical contact to “light-receiving layer 1” via the
`
`p-type “ohmic contact layer”] electrically connected to the semiconductor layer and in contact with the
`
`p- type semiconductor layer; and
`
`a second electrode [“ohmic electrode 3”] spaced apart from thefirst electrode and at least
`
`partially in contact with one of the semiconductor layer and the substrate, wherein
`
`the first electrode includesa first opening part [see Fig. 1b],
`
`but does not actually state “the semiconductor layer having semi-insulating properties”.
`
`Howeversee “GaN-based crystal used for the light-receiving layer” see “when the carrier
`
`concentration is low” “Alternatively, an i-layer is preferable” thus the doping in the light-receiving layer
`
`can be as low as beingintrinsic type.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 4
`
`Thus it would be obvious to modify Kazuyuki to include that “the semiconductor layer having
`
`semi-insulating properties”.
`
`The motivation is that GaN-based crystal of low to intrinsic concentration is having semi-
`
`insulating properties.
`
`In regard to claim 10 Kazuyuki teaches wherein an active region of the semiconductor layer is
`
`rectangular [see Fig. 2].
`
`In regard to claim 18 Kazuyuki teaches wherein the semiconductor layer is formed [see thatx, y
`
`and x+y can be zero, see “The material of the light receiving layer is GaN Any type of crystal may be
`
`used, but InGaN is preferable for light having a wavelength longer than 365 nm, and GaN or AlGaN is
`
`preferable for ultraviolet light having a wavelength shorter than 365 nm”] based on InxAlyGa1-x-y)N,
`
`whereO<x<1,0<y<1,and 0<xty<1.
`
`In regard to claim 19 Kazuyuki teaches wherein the substrate is a GAN substrate [see claim
`
`lincludes “GaN-basedcrystal layer 4” and “substrate 5” J.
`
`3.
`
`Claim 2-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kazuyuki in view of
`
`Inazu et al. (US 20140021442 A1) hereafter referred to as Inazu
`
`In regard to claim 2 Kazuyuki does not teach wherein the p-type semiconductor layer includes a
`
`second openingpart.
`
`Howeversee Inazu Fig. 1 see paragraph 0017, 0069 “p-type contact layer 10 of p-type GaN” “as
`
`illustrated in FIG. 28, a p-type contact layer of p-type GaN or the like that can make Ohmic contact with
`
`the p-electrode with a low resistance”, see the “n-electrode 12 (corresponding to an n-electrode metal
`
`layer) made of, for example, Ti/AI/Ti/Au”.
`
`Thus it would be obvious to modify Kazuyuki to include that the p-type “ohmic contact layer”is
`
`only undereach of the “ohmic electrode 2”.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 5
`
`Thus it would be obvious to combine the references to arrive at the claimed invention.
`
`The motivation is that ohmic contact is not needed between the “ohmic electrode 2” and to
`
`increase light to the light receiving layer.
`
`In regard to claim 3 Kazuyuki and Inazu as combined teaches wherein the p-type semiconductor
`
`layer is exposed [see Inazu Fig. 1 see combination, the side of the p-type “ohmic contact layer”is
`
`exposed by the opening] from the first opening part.
`
`In regard to claim 4 Kazuyuki and Inazu as combined teaches wherein the semiconductor layer is
`
`exposed[see Inazu Fig. 1 see combination, the “light-receiving layer 1” is exposed by the opening] from
`
`the first opening part.
`
`In regard to claim 5 Kazuyuki and Inazu as combined teaches wherein a border portion between
`
`the semiconductor layer and the p-type semiconductor layer is exposed [see Inazu Fig. 1 see
`
`combination, the “light-receiving layer 1” near the p-type “ohmic contact layer” is exposed by the
`
`opening] from the first opening part.
`
`4.
`
`Claim 11, 9, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kazuyuki in view
`
`of Kajitani et al. (WO 2016185645 A1) hereafter referred to as Kajitani
`
`In regard to claim 11 Kazuyuki does not teach wherein an active region of the semiconductor
`
`layer is circular.
`
`See Kajitani Figs. 5, 6, 7 the junction of 103/102is formed in different shapes from rectangular
`
`to hexagon to annular circle.
`
`Thus it would be obvious to modify Kazuyuki to include that wherein an active region of the
`
`semiconductor layer is circular.
`
`Thus it would be obvious to combine the referencesto arrive at the claimed invention.
`
`The motivation is to use different patterns to absorb for different light sources.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 6
`
`In regard to claim 9 Kazuyuki and Kajitani as combined teaches wherein the second opening part
`
`includesa plurality of openings each of which is annular [see combination see Kajitani Fig. 7 annular ring
`
`with multiple 103] in shape, the plurality of openings are concentrically arranged, an exposedpart of the
`
`semiconductor layer exposed from the second openingpart includes: a first region wherethe first
`
`electrode is provided on the exposed part; and a second region wherethe first electrode is not provided
`
`on the exposed part, and the first region and the second region are located alternately in a radial
`
`direction.
`
`In regard to claim 12 Kazuyuki does not teach wherein the second electrode is provided ona
`
`bottom surface of the substrate.
`
`See Kajitani Figs. 3 see cathode electrode (110).
`
`Thus it would be obvious to modify Kazuyuki like Kajitani to include that wherein the second
`
`electrode is provided on a bottom surface of the substrate.
`
`Thus it would be obvious to combine the referencesto arrive at the claimed invention.
`
`The motivation is to use space on the bottom for electrode so as to save spacelaterally.
`
`5.
`
`Claim 14, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kazuyuki in view of
`
`Yasuhiro (JP 2014127499 A) .
`
`In regard to claim 14 Kazuyuki does not teach wherein the semiconductor layer has different
`
`impurity concentrations in a stacking direction.
`
`Yasuhiro teaches MQWactive layers see “typeII (InGaAs / GaAsSb) MQW is not deteriorated. As
`
`the p-type impurity, Zn is used in this embodiment, but carbon or the like may be used”.
`
`Thus it would be obvious to modify Kazuyuki to include wherein the semiconductor layer has
`
`different impurity concentrations in a stacking direction.
`
`Thus it would be obvious to combine the references to arrive at the claimed invention.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 7
`
`The motivation is that MQW is knowntogive goodresults to detectlight.
`
`In regard to claim 17 Kazuyuki and Yasuhiro as combined teaches wherein an impurity [see
`
`combination see carbon is p-type dopant] with which the semiconductor layer is doped is carbon.
`
`6.
`
`Claim 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kazuyuki in view of Tu
`
`et al. (US 20170179184 A1) hereafter referred to as Tu.
`
`In regard to claim 20 Kazuyuki does not teach a semiconductor relay, comprising: the
`
`semiconductor light receiving element according to claim 1; and a light emitting element which emits
`
`light toward the semiconductor light receiving element.
`
`Tu teaches see Abstract. paragraph 0005 “A photorelay includes an illuminating unit, a
`
`photoelectric conversion IC, a first MOS IC and a second MOS IC. The illuminating unit receives an input
`
`signal to generate an illuminating signal. The photoelectric conversion IC receivesthe illuminating signal
`
`to generate a voltage control signal accordingly. The second MOSIC is reversely stacked on the first
`
`MOSIC, such that the source electrodes of the two MOSICs are electrically connected, and the gate
`
`electrodes of the two MOS ICsare electrically connected through a gate connection structure for
`
`receiving the voltage control signal, and the drain electrodes of the two MOS ICs generate an output
`
`signal according to the received voltage control signal” “A relay is an electrically operated device with a
`
`control system (also knownas an input circuit) and a system to be controlled (also known as an output
`
`circuit), and is usually used in the automatic control system. The relay is operated as an “automatic
`
`switch” to control a large current by using a small current and has the abilities including automatic
`
`control, overload or fault protection, signal conversion, etc”.
`
`Thus it would be obvious to modify Kazuyuki to include a semiconductor relay, comprising: the
`
`semiconductor light receiving element according to claim 1; and a light emitting element which emits
`
`light toward the semiconductor light receiving element.
`
`

`

`Application/Control Number: 16/962,556
`Art Unit: 2818
`
`Page 8
`
`Thus it would be obvious to combine the referencesto arrive at the claimed invention.
`
`The motivation is to control large current by using a small current.
`
`Conclusion
`
`Any inquiry concerning this communication or earlier communications from the examiner
`
`should be directed to SITARAMARAO S YECHURI whosetelephone number is (571)272-8764. The
`
`examiner can normally be reached on M-F 8:00-4:30 PM.
`
`Examiner interviewsare available via telephone, in-person, and video conferencing using a
`
`USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use
`
`the USPTO Automated Interview Request(AIR) at http://www.uspto.gov/interviewpractice.
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor,
`
`Steven H Loke can be reached on (571)272-1657. The fax phone number for the organization wherethis
`
`application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the Patent Application
`
`Information Retrieval (PAIR) system. Status information for published applications may be obtained
`
`from either Private PAIR or Public PAIR. Status information for unpublished applications is available
`
`through Private PAIR only. For more information about the PAIR system, see https://ppair-
`
`my.uspto.gov/pair/PrivatePair. Should you have questions on accessto the Private PAIR system, contact
`
`the Electronic Business Center (EBC) at 866-217-9197(toll-free). If you would like assistance from a
`
`USPTO Customer Service Representative or access to the automated information system, call 800-786-
`
`9199 (IN USA OR CANADA)or 571-272-1000.
`
`/SITARAMARAOS YECHURI/
`Primary Examiner, Art Unit 2818
`
`

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