LIQUID CRYSTAL DISPLAY DEVICE
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`CROSS REFERENCE TO RELATED APPLICATION
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`This application is a continuation of U.S. application Serial No. 11/318,583,
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`filed December 28, 2005, whichis a divisional of U.S. application Serial No.
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`10/212 ,208, filed August 6, 2002, now US Patent No. 7,027,025, the contents of
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`which are incorporated herein by reference.
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`LO
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`BACKGROUND OF THE INVENTION
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`The presentinvention reiates to a liquid crystal display device, and, more
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`particularly, to an improved active matrix type of liquid crysial display device in which
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`flicker is eliminated and the power consumption is reduced.
`In an active matrix type ofliquid crystal display device, on a liquid-crystal side
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`surface of one of a pair of substrates, which are arranged to face each other in an
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`opposed manner, while sandwiching liquid crystal material therebetween, there are
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`formed gate signal lines, which extend in the x direction and which are arrangedin
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`parallel in the y direction, and drain signal lines, which extend in the y direction and
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`which are arrangedin parallel in the x direction. Regions which are surrounded by
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`these respective gate lines and drain lines constitute pixel regions.
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`Eachpixel region includes a switching element which is operated in response
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`to a scanning signai from a one-side gate signal line and a pixel electrode to which a
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`video signal is supplied from a one-side drain signal line by way of the switching
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`element. Betweenthe pixel electrode and a counter electrode, which is formed ona
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`liquid-crystal-side surface of either one of the pair of substrates, an electric field is
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`generated, and the optical transmissivity of the liquid crystal material is controlled in
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`responseto the electric field.
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`Further, one of the gate signallines is selected in response to a scanning
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`signal supplied from a vertical scanning driving circuit, and a video signal is supplied
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`to each drain signal line from a video signal driver circuit at the timing of selection of
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`the gate signal line.
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`In a liquid crystal display device having such a constitution, a so-called dot
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`inversion driving method has been employed, in which, to prevent the deterioration
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`of the liquid crystal material caused by poiarization derived from applying a voltage
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`having a direct current componentto the liquid crystal materiai for a long time, the
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`polarity of the voltage applied to respective liquid crystals of neighboring pixei
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`regionsis inverted (alternated}, so that the polarity of the voltage applied to each
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`liquid crystal is inverted at every frame.
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`Further, as a display mode of the liquid crystal display device, a dot matrix
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`display and a character display have been known, wherein data inputted to the
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`above-mentioned video signal driver circuit is constituted of dot-matrix data.
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`Still further, in a so-called transmission type liquid crystal display device,
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`whichis provided with a backlight on a back surface of a liquid crystai display panel,
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`image display is usually performed while setting the brightness of the backlight at a
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`fixed value.
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`SUMMARYOF THE INVENTION
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`However, in such a liquid crystal display device, which adopts the above-
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`mentioned dot inversion driving method, a display pattern inevitably exists which
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`offsets the alternation of liquid crystal driving, and it has been pointed out thatflicker
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`occurs in such a case.
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`Further, it also has been pointed out that the dot-matrix data inputted to the
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`above-mentioned video signal driver circuit increases the power consumption
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`required for transferring such data.
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`Stil further, recenily, it has been pointed out that not onlystill images, but also
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`moving images, are being visualized in large quantity as display images, and the
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`brightness of these imagesis slightly reduced when the moving images are
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`visualized; and, hence, the moving images cannot be clearly recognized.
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`The present invention has been madein view of the above-mentioned
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`circumstances, andit is an object of the present invention to provide a liquid crystal
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`display device which can suppress the generationof flicker.
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`It is another object of the present invention to provide a liquid crystal display
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`device in which the power consumption thereof can be reduced.
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`It is still another object of the present invention to provide a liquid crystal
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`display device which can clearly display moving images.
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`Typical aspects and features of the present inventions, as disclosed in the
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`present application, will be summarized asfollows.
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`[Structural Feature 1 according to the Present Invention]
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`In a liquid crystal display device which hasa plurality of pixels arranged in the
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`form of a matrix, with each group of pixels being formed in respective lines along
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`gate signal lines, and in which there is meansfor alternating the polarities of voltages
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`applied to the liquid crystal material during a frame period with respect to an
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`alternation signal, the present invention provides: means for accumulating signal
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`levels of pixel data for odd-numberedlines of the pixels during every frame period
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`(accumulator A); means for accumulating signal levels of pixel data for even-
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`numberedlines of the pixels during every frame period (accumulator B); subtracting
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`meansfor obtaining a subtracted value by subtracting one of the accumulated values
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`of the signal levels for the odd-numberedlines and for the even-numberedlines from
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`one another (subtractor), and alternation signal transmitter means for transmitting
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`anotheralternation signal, that is different from (e.g. out of phase with) the current
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`alternation signal, when the subtracted value obtained by the subtracting meansis
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`not less than a reference value (e.g. selector).
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`In a liquid crystal display device having such a constitution, there is no
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`possibility that the voltage applying poiarity and the display data are biased; and,
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`hence, the liquid crystal applying voltage is made uniform with respect to the
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`commonvoltage. Accordingly, it is unnecessary to increase the quantity of current
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`supplied to the commonelectrode, so that the power consumption can be
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`suppressed.
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`[Structural Feature 2 according to the Present Invention]
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`The structural feature 2 of the liquid crystal display device according to the
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`present invention is defined, for example, by (a) meansfor receiving input data,
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`including a character display and dot matrix data, and for producing the dot matrix
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`data from the input data when a display enable signal is in a High-state (e.g. a logic
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`element receiving the input data and the display enable signal); (b) means for
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`generating character data from the input data when the display enable signalis ina
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`Low-state (e.g. a color palette converiing circuit, a character-generating circuit, ora
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`character-address generating circuit, and a logic element disposed prior thereto);
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`and (c) means for outputting display data by synthesizing the character data with the
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`dot matrix data (e.g. an image synthesizing circuit), each provided for the liquid
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`crystai display device.
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`In the liquid crystal display device having such a constitution, when the
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`character display is performed along with a dot matrix display, input data for the
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`character display is fetched as character data and is synthesized with the dot-matrix
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`data. Due to such a constitution, the power consumption necessary for data transfer
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`can be reduced.
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`[Structural Feature 3 according io the Present Invention]
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`In a liquid crystal! display device having a liquid crystal display panel to which
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`display data is inputted and a backlight arranged at a back surface of the liquid
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`crystal dispiay panel, the present invention provides:a first means for identifying
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`gray scales in respective pixel data included in the display datum (e.g. a gray scale
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`decoder); a second meansfor detecting the existence of predetermined gray scale
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`levels in the gray scales identified by the first means (e.g. gray scale resistors
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`provided for every predetermined gray scale level); a third means for totaling up the
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`number of the gray scale levels detected by the second means(e.g. an adder); and
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`a fourth means for outputting a control signal to the backlight, which fails into one of
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`a plurality of brightness control ranges of the backlight, with respect to the number of
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`the gray scale levels totaled up by the third means, wherein the fourth means divides
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`the brightness range of the backlight te be regulated thereby into a plurality of
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`brightness control ranges (e.g. a resistor).
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`In the liquid crystal display device having such a constitution, moving images
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`displayed on the liquid crystal display panel are displayed with a brightness which is
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`greater than the brightness which is obtained when still images are displayed. Due
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`to such a constitution, the motion of the moving images can be clearly displayed. On
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`the other hand, it also has been confirmed that, when the dispiay imagesarestill
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`images,the stili images can be clearly displayed even when the brightness thereofis
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`not so large.
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`Further, the distinction between the moving images and the still images is
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`detected, and an optimum brightness display is produced in responseto the result of
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`detection; and, hence, it is possible to obtain an advantageous effectin that the
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`power consumption can be reduced.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`Fig. 1 is a block diagram showing cne embodiment of a liquid crystal display
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`device according to the present invention;
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`Fig. 2 is an equivalent circuit diagram showing one embodimentofa liquid
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`crystal display panel of the liquid crystal display device according to the present
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`invention;
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`Fig. 3 is a schematic diagram showing the liquid crystal display panel and a
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`periphery thereof of the liquid crystal display device according to the present
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`invention;
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`Fig. 4 is a schematic circuit diagram showing one embodimentof a driving
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`voltage generatorcircuit of the liquid crystal display device according to the present
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`invention;
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`Fig. 5 is a diagram showing an advantageous effect obtained by the provision
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`of the circuit shownin Fig. 1 of the liquid crystal display device according to the
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`present invention;
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`Fig. 6 is a diagram showing drawbacks of a conventional liquid crystal display
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`device in comparison to Fig. 5;
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`Fig. 7 is a schematic circuit diagram showing another embodiment of the
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`liquid crystal display device according to the present invention; and
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`Fig. 8 is a block diagram showing another embodimentofthe liquid crystal
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`display device according to the present invention.
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`DETAILED DESCRIPTION
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`Preferred embodimentsof a liquid crystal display device according to the
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`presentinvention will be described hereinafter in conjunction with the drawings.-
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`[Embodiment 1]
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`<<Circuit diagram ofliquid crystal display panel PNL>>
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`Fig. 2 is a view showinga circuit of a liquid crystal display panel PNL.
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`Although the drawing showsa circuit diagram of the display panel, it is depicted so
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`as to correspond to an actual geometric arrangementof the elements.
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`First of all, there is provided a transparent substrate SUB 1. On a surface (ihe
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`surface which faces a transparent substrate SUB2 in an opposed manner), gate
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`signal lines GL, which extend in the x direction and are arrangedin parallel in the y
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`direction, and drain signal lines DL, which extend in the y direction and are arranged
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`in parallel in the x direction, are formed. Regions surrounded by the gate signal lines
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`GL and the drain signal lines DL constitute pixel regions (pixels), and these
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`respective pixels, which constitute a liquid crystal display portion AR, are arranged in
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`a matrix array.
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`Within each pixel region, there is a switching element (thin film transistor)
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`TFT, which is operated in response to a scanning signal supplied from a one-side
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`gate signal line GL, and a pixel electrode PIX, to which a video signal from a one-
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`side drain signal line DL ts supplied through the switching element TFT. An electric
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`field is generated between the pixel electrode PIX and a counter electrode CT (not
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`shownin the drawing), which is provided on either one of the respective transparent
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`substrates, in each pixel, and the optical transmissivity of the liquid crystal for the
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`selected pixel is controlled by the electric field.
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`Each gate signal line GL has one end thereof connected to a vertical scanning
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`driving circuit V, and a scanning signal is supplied to each gate signal line GL from
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`the vertical scanning driving circuit V. Further, each drain signal line DL has one end
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`thereof connected to a video signal driver circuit He, and a video signal is supplied to
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`each drain signal line DL from the video signal driver circuit He. Here, respective
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`drain signal lines DL are constituted of signal lines which sequentially repeat a color
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`display of R, G, B from the left toward the right in the figure, for example.
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`Accordingly, three pixels, which are arranged adjacent to each other and are
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`connected to the same gate signal line GL, constitute one pixel in a color display.
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`The above-mentioned transparent substrate SUB1 is arranged to face the
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`other transparent substrate SUB2 with a liquid crystal material being disposed
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`therebetween, and a sealing material SL, which surrounds the above-mentioned
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`liquid crystal display portion AR so as to seal the liquid crystal, is used for fixing the
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`above-mentioned transparent substrates SUB1, SUB2 to one another.
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`Further, the liquid crystal display panel PNL having such a constitution is of a
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`so-called transmission type, and so a backlight BL is arranged on a back surface of
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`the panel PNL.
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`<<Circuit of liquid crystal display panel PNL and periphery thereof>>
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`Fig. 3 is a schematic diagram of the above-mentionedliquid crystal display
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`panel PNL andthe periphery thereof. For the sake of brevity, a case in which the
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`liquid crystal display device is configured for the display of 256 colors, for example, is
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`shownin Fig. 3.
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`First of all, an interface part, which corresponds to a microcomputer system or
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`the like, is constituted of a timing converter TCON. To an input terminal of this timing
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`converter TCON, color data Ro - R7, Go- G7, Bo - B7, which correspond to inputs of R,
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`G, B of a standard color CRT (cathode ray tube), a horizontal synchronizing signal
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`HSYNC, a vertical synchronizing signal VSYNC, a display timing signal YDISP and
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`the like are inputted. Further, signals, which are obtained by converting respective
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`data from the above-mentioned input terminal and which drive the liquid crystal
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`display panel PNL, are outputted from an output terminal of the timing converter
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`TCON.
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`A phaselocked loopcircuit PLL is connected to the timing converter TCON,
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`and a 1 dot clock pulse DOTCLKis inputted to the phase locked loop circuit PLL and
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`a clock pulse PLLOUTis supplied to the timing converter TCON by this phase locked
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`loop circuit PLL.
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`The vertical scanning driving circuit V, which is mounted on the liquid crystal
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`display panel PNL,is constituted of a dynamic-type shift resister and a driver, for
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`example, wherein a frame signal (FLM signal) and a pulse CL2, which corresponds
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`to the scanning timing, are inputted to the vertical scanning driving circuit V from the
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`output terminal of the above-mentioned timing converter TCON. Due to such a
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`constitution, a scanning signal is sequentially outputted to respective gate signal
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`lines GL, which are respectively connected to output terminals of the vertical
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`scanning driving circuit V.
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`Further, to the video signal driver circuit He that is mounted on the liquid
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`crystal display panel PNL, a clock pulse CL1, which is outputted from the output
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`terminal of the timing converter TCON, and data DATA of several bit units, which is
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`transmitted in serial form through a signal bus, are inputted. The clock pulse CL1 is
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`used for latching the above-mentioned data DATAat the video signal driver circuit
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`He for one line transferred in serial order. That is, the clock pulse CL1 is generated
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`whenthe transfer of data for one line is completed.
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`The transferred data is held and a driving voltage for one line is formed based
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`on the data, and the data is written in parallel in the pixel for one line corresponding
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`to the gate signal line GL selected by the above-mentioned vertical scanning driving
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`circuit V.
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`In this case, along with the above-mentioned writing into the pixel, the
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`serial fetching of data corresponding to a next line is performed in response to the
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`above-mentioned clock pulse CL1.
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`On the other hand, there is provided a powerstabilizer circuit PW, which
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`generatesstabilized voltages, such as +5V and -20V, which are necessary for use
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`as driving voltages, upon receiving two voltages, such as +5V and -24V,for
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`example. The powerstabilizer circuit PW is effectively operated upon receiving a
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`display control signal DISP/ON from the above-mentioned timing converter TCON.
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`Further, the stabilized voltages from the powerstabilizer circuit PW are
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`supplied to a driving voltage generator circuit CP, and the driving voltage generator
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`circuit CP generates respective driving voltages GSVthat are allocated to respective
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`gray scales. The respective driving voltages GSV are supplied to the video signal
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`driver circuit He.
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`<<Driving voltage generator circuit>>
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`Fig. 4 shows one example of the above-mentioned driving voltage generator
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`circuit CP, in which the polarities of the driving voltages (also called “Gray Scale
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`Voltage”, GSVin Fig. 3), which are outputted in response to gray scales, are
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`inverted between positive/negative polarity in every gate signal line GL and for every
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`frame. Due to such a constitution, the liquid crystal is subjected to a so-called
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`alternation driving (the counter electrode being fixed in this case); and, hence, there
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`is no possibility that a direct current componentwill be applied to the liquid crystal.
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`Thus, it is possible to obtain the advantageouseffect that the lifetime of the liquid
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`crystal is prolonged.
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`In the drawing, a series circuit, including a switch SW 1 and a switch SW2, is
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`connected betweena high-level voltage Vy (+5V for the example of Fig. 3) and a
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`low-level voltage V_ (-20V for the example of Fig. 3), and a driving voltage V; is
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`outputted from the connection point of the switches SW1 and SW/2. Further, a series
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`circuit, including a resister Rg and a resister Rio, is connected between the high-level
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`voltage Vy and the low-level voltage V_, and an intermediate voltage Vx is generated
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`at the connection point of the resisters Rg and Rio.
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`With respect to the operation of the switches SW1 and SW2, when one of
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`them assumesthe ON state, the other assumes the OFF state. This changeover is
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`performed in response to the changeover of the gate signal lines GL, for example. A
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`series circuit consisting of resisters R; to Rg is connected between a connection
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`point of the resisters Rg and Rio and a connection pointof the switches SW1 and
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`SW/2, wherein respective driving voltages V2 to Vg are outputted from lines
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`connected between each of respective resisters Ri to Rg. Respective driving
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`voltages GSV, that are outputted from the driving voltage generatorcircuit CP,
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`include voltages of eight stages and adopt the descending orderof driving voltages
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`V1 to Vs.
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`Due to such a constitution, when the odd-numbered gate signal lines GL are
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`selected, the switch SW’1 is turned ON in responseto the signal M received from the
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`timing converter TCON, and driving voltages of positive polarity +V, to +V, are
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`formed in response to the high-level voltage Vy and the intermediate voltage Vu.
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`Then, when the even-numbered gate signal lines GL are selected, the switch SW2 is
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`turned ON in responseto the signal M received from the timing converter TCON, and
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`driving voltages of negative polarity -V; to -Vs are formed in responseto the low-level
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`voltage V_ and the intermediate voltage Vy. Such changeover of the switches SW1
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`and $W2is performed at every changeoverof a frame.
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`Here, in this embodiment, with respect to a pixel group driven by respective
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`gate signal lines GL, the polarities of voltages applied to respective jiquid crystals of
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`the pixeis which are arranged close to each other are also inverted. This inversion is
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`performed inside of the above-mentioned video signal driver circuit He, for example.
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`<<Voltage polarity inversion adjusting circuit>>
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`Fig. 1 showsa circuit for adjusting the above-mentioned inversion of the
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`polarity of the voltage applied to the liquid crystal material in response to input data
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`inputted to the timing controller TCON (hereinafter referred to as inputted display
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`data), and this circuit is incorporated into the above-mentioned timing controller
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`TCON, for example.
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`In the circuit of Fig. 1, first of all, there is provided a serial/parallel converter
`102. Inputted display data 101 is configured to be inputted into this serial/parallel
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`converter 102. The inputted display data 101 includes a large number of pixel data,
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`and this pixel data is outputted from the serial/parallel converter 102, after being
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`classified into pixel data of odd-numbered lines and pixel data of even-numbered
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`lines in the vertical scanning of the liquid crystal display part.
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`Further, the respective pixel data of the inputted display data 101 respectively
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`include information on red (R), green (G), blue (B) colors of the coijor display, and
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`inputting of the inputted dispiay data 101 to the serial/paraliel converter 102 is
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`performed through different input terminals Rdata, Gdata, Bdata, which correspond
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`to respective information of red (R), green (G), blue (B) colors for every pixel data.
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`The outputting of the inputted display data 101 from the serial/parallel converter 102
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`is performed through different output terminals Rodd, Godd, Bodd, which correspond
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`to respective information of red (R), green (G), blue (B) colors of respective pixel
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`data of the odd-numbered lines and is performed through different output terminals
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`Reven, Geven, Beven, which correspond to respective information of red (R), green
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`(G), blue (B) colors of respective pixel data of the even-numbered lines. Such
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`operations are performed with respect fo respective pixels which differ in color
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`information in responseto the inputting of a clock signal 113 to the serial/paralle!
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`converter 102.
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`Then, outputs from the output terminals Rodd, Bodd, Geven of the
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`serial/parallel converter 102 are inputted to an accumulator A103, while outputs from
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`the output terminals Godd, Reven, Beven of the serial/parailel converter 102 are
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`inputted to an accumulator B 104.
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`In the accumulator A103, the signal levels (corresponding to brightness) of
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`respective pixel data, which are inputted to the accumulator A103, are sequentially
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`accumulated, and an accumulated value is temporarily stored in a register A105.
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`Further, and simultaneously therewith, in the accumulator B104, the signal ievels of
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`respective pixel data, which are inputted to the accumulator B104, are sequentially
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`accumulated, and an accumulated value is temporarily stored in a register B106.
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`Clock signals 113 are respectively inputted to the accumulators A103, B104,
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`and accumulations of signal lines in the accumulators A103, B104 are performed for
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`respective pixels which differ in color information. On the other hand, vertical
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`synchronizing signals 112 are inputted to the registers A105, B106, respectively, and
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`the accumulations of signal levels in the registers A105, B 106 are performed for
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`every frame ofthe liquid crystal display. That is, due to such a constitution, it is
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`possible to obtain the accumulated value of signal levels of pixel data (R, G, B) of
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`respective odd-numbered lines and the accumulated value of signal levels of pixel
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`data (R, G, B) of respective even-numbered lines for every frame.
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`Then, signals which correspond to respective accumulated values are
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`inputted to a subtracter 107. The result of subtraction between the accumulated
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`value stored in the register A105 and the accumulated value stored in the register
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`B106 is obtained by the subtracter 107. The subtracter 107 outputs an alternation
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`selector signal 116, when a subtracted value calculated by the subtracter 107
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`becomes equal to or more than a reference value. Here, the above-mentioned
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`subtracter 107 allows inputting of a signal from a reference value changing means
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`120, which changes the reference value so that the reference value can be arbitrarily
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`set.
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`In this regard, an operator can operate the reference value changing means
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`120 so as to change the reference value to a given value based on the observation
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`of a display surface of the liquid crystal panel, for example.
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`On the other hand, an alternation signal generating circuit 108 is also
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`provided. Tne alternation signal generating circuit 108 generates an alternation
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`signal A109 and an alternation signal B110, whose phasesareshifted by 180°, in
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`responseto a horizontal synchronizing signal 111 and a vertical synchronizing signal
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`112. These alternation signals A109, B 110 are outputted to a selector 114, and the
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`selector 114 changes over betweenthe alternation signals A109, B110, based on
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`the selection indicated by the alternation selector signal 116, and outputs an
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`alternation signal 115. The alternation signal 115 is used as a signal for changing
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`over switches SW1, SWof the driving voltage generator circuit CP, andit is used
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`for the inversion of the polarities of the neighboring pixels in the pixel group in each
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`liné in the video signal driver circuit He.
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`The liquid crystal display device having such a constitution detects a case in
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`which there exists a bias with respect to display data quantities of positive polarity
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`and negative polarity in one frame and changesthe alternation period of the liquid
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`crystal, thus suppressing the generation offlicker and preventing an increasein the
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`power consumption.
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`With respect to the generation of the alternation period of the liquid crystal in
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`the conventionalliquid crystal display device which is not constituted in such a
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`manner, a display pattern which offsets the alternation exists, and, hence, flicker is
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`generated. Further, there has been a drawback with such display devicesin that,
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`due to the bias of the display data at the positive polarity and the negative polarity
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`with respect to the polarity of the voltage applied to the liquid crystal, the current to
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`the common electrode is increased, whereby the power consumption is increased.
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`Fig. 5 is a view showing one exampleof the relationship betweenthe liquid
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`crystal applying voltage and the alternation signal established by the above-
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`mentioned constitution in accordance with the present invention.
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`As can be understood from Fig. 5, while a white and black inversion pattern is
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`inputted for every dot and every line, the alternation signal is changed for every dot
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`and every two lines. Accordingly, there is no possibility that the polarity of applied
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`voltages 301, 303, 305, 307 and the display data 302, 304, 306, 308 are biased, and
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`the liquid crystal applying voltage 329 is made uniform with respect to common
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`voltages 311, 316, 321, 326. Accordingly, the quantity of current supplied to the
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`10
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`common electrodes is not increased, and, hence, the power consumption can be
`
`suppressed.
`
`Further, for similar reasons, it is possible to suppress the generation offlicker
`
`that is derived from the non-uniformity of common electrodes on the display screen
`
`of the liquid crystal display panel.
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`15
`
`Fig. 6 is a view showing one example of the relationship between the liquid
`
`crystal applying voltage and the alternation signal in the conventionalliquid crystal
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`display device, in comparison to Fig. 5. As can be seen from Fig. 6, the alternation
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`signal is fixed; and, hence, when the display data is formed of a white and black
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`inversion pattern for every dot and every line, the polarity of the applying voltages
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`20
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`201, 203, 205, 207 and the display data 201, 204, 206, 208 are biased, whereby the
`
`liquid crystal applying voltage 229 is biased with respect to the commonelectrodes.
`
`[Embodiment2]
`
`Fig. 7 is a circuit diagram of another embodimentof the liquid crystal display
`
`device according to the present invention, and it shows a circuit that is incorporated
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`25
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`inside of the above-mentioned timing converter TCON, for example.
`
`In the circuit shown in Fig. 7, inputted display data 101 is acquired as dot-
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`matrix data 130, during periods in which a display enable signal 121 assumes the
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`HIGH state. Meanwhile, the inputted display data 101 is acquired as a color code, a
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`14
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`

`

`character code and a character-address code andis inputted into a color palette
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`converting circuit 122, a character generating circuit 123 and a character-address
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`generating circuit 124, respectively, during periods in which the display enable signal
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`121 assumes the LOW state (fiy-back period).
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`The data acquired as the dot-matrix data 130 is inputted to an image
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`synthesizing circuit 140 and is synthesized with respective data, as will be explained
`
`later, by the image synthesizing circuit 140. The data acquired as the color codesis
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`inputted to the color palette converting circuit 122. The color palette converting
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`circuit 122 generates color data 132 and outputs the color data 132 therefrom. The
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`10
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`data acquired as the character code is inputted to the character generating circuit
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`123, and the character generating circuit 123 generates character dot-mairix data
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`133 and outputs the character dot-matrix data 133 therefrom. The data acquired as
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`the character-address codeis inputted into the character-address generating circuit
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`124, and the character-address generating circuit 124 generates character-
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`15
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`displaying address data 134 and outputs the character-displaying address data 134
`
`therefrom.
`
`The color data 132, the character dot-matrix data 133 and the character-
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`displaying address data 134 are respectively inputted to the image synthesizing
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`circuit 140, and these respective data are synthesized with each other, along with
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`20
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`the above-mentioned dot-matrix data 130. The synthesized data is outputted as
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`output display data 141 from the image synthesizing circuit 140 andis inputted to the
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`video driving circuit He shownin Fig. 3.
`
`In the liquid crystal display device having such a constitution, when a
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`character display is produced along with a dot matrix display, the input data for the
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`25
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`character display is acquired as the character data 133 and is synthesized with the
`dot-matrix data 130. Accordingly, the power consumption for data transfer can be
`
`reduced.
`
`i5
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`

`

`When the frequency of the character display in the pixel display is increased,
`
`the power consumption reduction effect becomes apparent, and, hence, the liquid
`
`crystal display device is also applicable for use as a liquid crystal display for a
`
`portable telephone, for example, in which a drastic reduction in the power
`
`consumption is demanded.
`
`[Embodiment 3]
`
`Fig. 8 is a circuit diagram of another embodimentof the liquid crystal display
`
`device according to the present invention, and it showsa circuit which is
`
`incorporated into the above-mentioned timing converter TCON.
`
`10
`
`in Fig. 8, first of all, there is provided a gray scale decoder 150.
`
`Inputted
`
`display data 101 is inputted into the gray scale decoder 150. The inputted display
`
`data 101 is constituted of a large number of pixel data which have respective gray
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`scales ranging from 0 to N. The gray scale decoder 150 classifies respective pixel
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`data in accordance with the respective gray scales thereof. When there is pixel data
`
`15
`
`which correspondsto a particular gray scale among the respective gray scales, a
`
`signal “1” for example, is outputted; and, when there is no pixel data which
`
`corresponds to a particular gray scale among the respective gray scales, a
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`signal “OQ”, for example, is outputted.
`
`More particularly, the gray scale decoder 150 includes (N+1) output terminals,
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`20
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`and it outputs a signal indicative of the presence/absence ofpixel data of null gray
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`scale level, a signal indicative of the presence/absenceofpixel data ofa first gray
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`scale level, a signal indicative of the presence/absenceof pixel data of second gray
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`scale level, ..., or a signal indicative of the presence/absence of pixel data of Nth
`
`gray scale level in the inputted display data 101, from a corresponding o