`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www.uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`
`
`
`CONFIRMATIONNO.
`
`12/420,991
`
`04/09/2009
`
`Katsumi MATSUMOTO
`
`1508.49867X00
`
`3551
`
`20457
`7590
`03/27/2013
`ANTONELLL, TERRY, STOUT & KRAUS, LLP
`1300 NORTH SEVENTEENTH STREET
`SUITE 1800
`ARLINGTON,VA 22209-3873
`
`
`EXAMINER
`
`KUMAR, SRILAKSHMIK
`
`2694
`
`MAIL DATE
`
`03/27/2013
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`Application No.
`Applicant(s)
`
`Office Action Summary
`
`12/420,991
`Examiner
`SRILAKSHMI K. KUMAR
`
`MATSUMOTOETAL.
`Art Unit
`2694
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address--
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTH(S) OR THIRTY(30) DAYS,
`WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a).
`In no event, however, may a reply be timely filed
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Anyreply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`Status
`
`1)X] Responsive to communication(s) filed on 21 November 2012.
`2a)X] This action is FINAL.
`2b)L] This action is non-final.
`3)L] An election was made bythe applicant in response to a restriction requirement set forth during the interview on
`
`; the restriction requirement and election have been incorporated into this action.
`4)_] Sincethis application is in condition for allowance exceptfor formal matters, prosecution as to the merits is
`closed in accordance with the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims
`
`5) Claim(s) 1-8 is/are pending in the application.
`
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`6)L] Claim(s)
`is/are allowed.
`7) Claim(s) 1-8 is/are rejected.
`8)L] Claim(s) ___is/are objectedto.
`
`9)L] Claim(s)
`are subject to restriction and/or election requirement.
`
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway
`program at a participating intellectual property office for the corresponding application. For more information, please see
`htto/Awww.uspto.gov/patenis/init events/ooh/index.jiso or send an inquiry to PPHieedback@usopio.qov.
`
`Application Papers
`
`10)L] The specification is objected to by the Examiner.
`
`11) The drawing(s) filed on
`is/are: a)[_] accepted or b)[_] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`
`12)[] Acknowledgmentis made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`a)L] All
`)LJ Some * c)L] None of:
`1..] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copiesof the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`* See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`1) C] Notice of References Cited (PTO-892)
`
`2) | Information Disclosure Statement(s) (PTO/SB/08)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`
`3) CT] Interview Summary (PTO-413)
`Paper No(s)/Mail Date.
`4) | Other:
`
`PTOL-326 (Rev. 09-12)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20130324
`
`
`
`

`

`Application/Control Number: 12/420,991
`
`Art Unit: 2694
`
`Page 2
`
`The following office action is in response to amendmentfiled on November 21, 2012. Claims 1-
`
`DETAILED ACTION
`
`8 are pending. Claims 1-3, 5, 6, and 8 have been amended.
`
`Claim Rejections - 35 USC § 103
`
`1,
`
`The following is a quotation of 35 U.S.C. 103(a) which formsthe basisforall
`
`obviousnessrejections set forth in this Office action:
`
`(a) A patent may not be obtained thoughthe inventionis not identically disclosed or described as set forth in
`section 102 ofthistitle, if the differences between the subject matter sought to be patented andthe prior art are
`such that the subject matter as a whole would have been obviousat the time the invention was made to a person
`having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the
`manner in which the invention was made.
`
`2.
`
`Claims 1-8 are rejected under 35 U.S.C. 103(a) as being unpatentable over Applicant’s
`
`Admitted Prior Art (AAPA)in view of JO (US PG-Pub 2008/0224755).
`
`Asto independent claim 1, AAPAteaches in paragraphsa display device provided with a
`
`level shift circuit (prior art, Fig. 4, paragraph 0004 of spec), characterized in that said level shift
`
`circuit comprises: a first thin film transistor (111, paragraph 0004) having a semiconductorlayer
`
`formedof a polysilicon layer (paragraph 0004); a first electrode for receiving an input signal
`
`(Fig. 6a, Vin into 313), a second electrode (314) and a control electrode (312) for receiving a
`
`voltage, wherein the first electrode is one of a source electrode and a drain electrode and the
`
`secondelectrode is the other of the source electrode and drain electrode (shown in Fig. 6A); a
`
`waveform rectifying circuit (115) connected to a second electrode of said first thin film transistor
`
`(Fig. 5); and a constant current source (116) and said first thin film transistor is an n type thin
`
`film transistor (Fig. 5, 111, shown as an n-type),
`
`AAPAdoesnot teach a switching element connected between the second electrode of
`
`said first thin film transistor and a reference power source, wherein a bias voltage is inputted into
`
`

`

`Application/Control Number: 12/420,991
`
`Art Unit: 2694
`
`Page 3
`
`a control electrode of said first thin film transistor and an input signal is inputted intoafirst
`
`electrode ofsaid first thin film transistor, said input signal is a signal of which the voltage level
`
`changes between a second voltage and a third voltage of which the potential is higher than that of
`
`said second voltage, the voltage level of said reference powersourceis a first voltage of which
`
`the potential is higher than that of said third voltage, and said level shift circuit converts said
`
`input signal of which the voltage level changes betweensaid third voltage and said second
`
`voltage to a signal of which the voltage level changes between said first voltage and said second
`
`voltage.
`
`JO teaches in Fig. 6A, a switching element connected between the second electrode of
`
`said first thin film transistor and a reference power source (where the switching elementis the
`
`TFT between VDD2 and Tpdin Fig. 6), and further, Jo teaches where said input signal is a
`
`signal of which the voltage level changes between a secondvoltage and a third voltage of which
`
`the potential is higher than that of said second voltage (paragraphs 0052-0058, 0060-0061, where
`
`the operation is the sameas in Fig. 5 for Fig. 6, with the switching elementis in place instead of
`
`the resistor as shownin fig. 5), the voltage level of said reference power sourceis a first voltage
`
`of which the potential is higher than that of said third voltage, and said level shift circuit converts
`
`said input signal of which the voltage level changes betweensaid third voltage and said second
`
`voltage to a signal of which the voltage level changes between said first voltage and said second
`
`voltage (paragraphs 0052-0061). It would have been obvious to one of ordinary skill in the art at
`
`the time the invention was madeto include the features of the switching element and bias
`
`voltages as taught by JO into AAPAin orderto provide a simple structure level shift circuit with
`
`proper operation (paragraph 0007).
`
`

`

`Application/Control Number: 12/420,991
`
`Art Unit: 2694
`
`Page 4
`
`Asto dependent claim 3, limitations of claim 1, AAPA teaches wherein that said constant
`
`current sourceis a resistor (116).
`
`Asto dependent claim 4, limitations of claim 1, the combination of AAPA and JO teach
`
`wherein said switching element is formed of a secondthin film transistor having a semiconductor
`
`layer formed of a polysilicon layer (where JO teaches the TFT switching element, and AAPA
`
`teaches where the TFTs have a semiconductor layer formed of polysilicon).
`
`Asto dependent claim 5, limitations of claim 1, AAPA in combination with JO teach
`
`wherein said switching element is formed of a secondthin film transistor having a semiconductor
`
`layer formed of a polysilicon layer (JO teaches the TFT switching element, and AAPAteaches
`
`the TFTs having a semiconductor layer formed of polysilicon), and JO teaches said second thin
`
`film transistor also functions as said constant current source when in an onstate (paragraphs
`
`0052-0061 of JO).
`
`Asto claims 2, 6-8, see claims 1, 3-5 above, and further in claim 2, the transistor is of a
`
`p-type which is taught by JO in paragraphs 0052-0061.
`
`Response to Arguments
`
`Applicant's arguments filed November 21, 2012 have been fully considered but they are
`
`not persuasive.
`
`Applicant argues wherethe prior art of Jo does not teach a switching element connected
`
`between the second electrode ofthe first thin film transistor and a reference power source and the
`
`secondelectrode is one of the source and drain. Examiner, respectfully disagrees. The prior art
`
`of Jo teaches the feature of the switching element between the second electrode of the first TFT
`
`and a reference powersource, specifically where the switching TFT is connected between the
`
`

`

`Application/Control Number: 12/420,991
`
`Art Unit: 2694
`
`Page 5
`
`first TFT (Tpd) and VDD2, as shownin twoplaces, where one is not the gate. The AAPAin
`
`combination with Jo teaches the claimed invention as AAPAteaches the source and drain being
`
`connected to voltages and power sources. Therefore, the combination of AAPA of JO teach the
`
`claimed invention. Thus, the rejection is maintained and made FINAL.
`
`Conclusion
`
`1.
`
`THIS ACTION IS MADEFINAL. Applicant is reminded of the extension of time
`
`policy as set forth in 37 CFR 1.136(a).
`
`A shortenedstatutory period for reply to this final action is set to expire THREE
`
`MONTHSfrom the mailing date of this action. In the event a first reply is filed within TWO
`
`MONTHSof the mailing date of this final action and the advisory action is not mailed until after
`
`the end of the THREE-MONTHshortened statutory period, then the shortened statutory period
`
`will expire on the date the advisory action is mailed, and any extension fee pursuant to 37
`
`CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event,
`
`however, will the statutory period for reply expire later than SIX MONTHSfrom the mailing
`
`date of this final action.
`
`Any inquiry concerning this communication or earlier communications from the
`
`examiner should be directed to SRILAKSHMI K. KUMARwhosetelephone numberis
`
`(571)272-7769. The examiner can normally be reached on 7:00 am to 3:30 pm.
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
`
`supervisor, Sue Lefkowitz can be reached on 571 272 3638. The fax phone numberfor the
`
`organization where this application or proceeding is assigned is 571-273-8300.
`
`

`

`Application/Control Number: 12/420,991
`
`Art Unit: 2694
`
`Page 6
`
`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published applications
`
`maybe obtained from either Private PAIR or Public PAIR. Status information for unpublished
`
`applications is available through Private PAIR only. For more information about the PAIR
`
`system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR
`
`system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would
`
`like assistance from a USPTO Customer Service Representative or access to the automated
`
`information system, call 800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/SRILAKSHMI K KUMAR/
`Primary Examiner, Art Unit 2694
`
`SKK
`3/23/2013
`
`