`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria1 Virginia 22313- 1450
`wwwnsptogov
`
`APPLICATION NO.
`
`
`
`
` F ING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`
`
`
`CONF {MATION NO.
`
`12/571,536
`
`10/01/2009
`
`Naruhiko KASAI
`
`1497.50261X00
`
`2153
`
`20457
`
`7590
`
`06/17/2013
`
`ANTONELLLTERRY,STOUT&KRAUS,LLP
`1300 NORTH SEVENTEENTH STREET
`SUITE 1 800
`ARLINGTON, VA 22209-3873
`
`TRUONG, NGUYEN H
`
`2694
`
`MAIL DATE
`
`06/ 1 7/201 3
`
`PAPER NUMBER
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL—90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 12/571,536 KASAI ET AL.
`
`
`AIA (First Inventorto File)
`Art Unit
`Examiner
`Office Action Summary
`
`
`NGUYEN H. TRUONG first“ 2694
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE 3 MONTH(S) OR THIRTY (30) DAYS,
`WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR 1.136(a).
`In no event however may a reply be timely filed
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`-
`-
`
`Status
`
`1)IXI Responsive to communication(s) filed on 1 October 2009.
`[I A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2b)lX| This action is non-final.
`a)I:| This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
`
`
`; the restriction requirement and election have been incorporated into this action.
`
`4)|:I Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under EX parte Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims
`5)IXI Claim(s) 1-14 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`6)|:l Claim(s) _ is/are allowed.
`7)IZ| Claim(s)_1-14 is/are rejected.
`8)I:I Claim(s) _ is/are objected to.
`
`9)|:l Claim((s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`hit
`://www.usoto. ov/ atents/init events"
`
`
`
`h/index.‘s or send an inquiry to PF"I-Ifeedback{<‘buspto.qov.
`
`Application Papers
`
`10)I:I The specification is objected to by the Examiner.
`11)IXI The drawing(s) filed on 01 October 2009 is/are: a)lZl accepted or b)I:I objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`12)IZI Acknowledgment is made of a claim for foreign priority under 35 U.S.C. §119(a)-(d) or (f).
`Certified copies:
`
`b)I:I Some * c)I:I None of the:
`a)le AII
`1.IZI Certified copies of the priority documents have been received.
`2.I:I Certified copies of the priority documents have been received in Application No.
`3.|:I Copies of the certified copies of the priority documents have been received in this National Stage
`
`application from the International Bureau (PCT Rule 17.2(a)).
`* See the attached detailed Office action for a list of the certified copies not received.
`
`Interim copies:
`
`a)|:l AII
`
`b)I:I Some
`
`c)I:I None of the:
`
`Interim copies of the priority documents have been received.
`
`Attachment(s)
`
`1) E Notice of References Cited (PTO-892)
`
`3) I] Interview Summary (PTO-413)
`
`Paper NOISIIMa” Date —
`PTO/SB/08
`t
`St t
`I
`D'
`t'
`f
`2 IXI I
`)
`4) I:I Other:
`a emen (s)(
`Isc osure
`n orma Ion
`)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
`PTOL-326 (Rev. 03-13)
`
`Part of Paper No./Mai| Date 20130606
`
`Office Action Summary
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 2
`
`Art Unit: 2694
`
`DETAILED ACTION
`
`Claim Rejections - 35 USC § 112
`
`l.
`
`The following is a quotation of 35 USC. ll2(b):
`
`(B) CONCLUSION—The specification shall conclude with one or more claims particularly
`pointing out and distinctly claiming the subject matter which the inventor or a joint inventor
`regards as the invention.
`
`The following is a quotation of 35 USC. 112 (pre—AIA), second paragraph:
`
`The specification shall conclude with one or more claims particularly pointing out and distinctly
`claiming the subject matter which the applicant regards as his invention.
`
`2.
`
`Claims 3,4,7,9,l3,l4 are rejected under 35 USC. ll2(b) or 35 USC. 112 (pre—AIA),
`
`second paragraph, as being indefinite for failing to particularly point out and distinctly claim the
`
`subject matter which the inventor or a joint inventor, or for pre—AIA the applicant regards as the
`
`invention. Particularly, Claims 3,4,7,9,l3,l4 recites “an arrangement direction” which appears to
`
`be indefinite. In Fig.2 of the present application, each of a plurality of power supply lines (e. g.,
`
`numerals 24, 25...) is arranged in a vertical direction intersecting with scan lines. Besides, the
`
`arrangement direction can be interpreted as a horizontal direction along which power supply
`
`lines are arranged one by one. Applicant is suggested to recite “a row-wise direction” or “a
`
`horizontal direction” to clearly define the arrangement direction of a plurality of power supply
`
`lines. In the Office Action, under Broadest Reasonable Interpretation, Examiner interprets the
`
`term "an arrangement direction" to be either "horizontal direction" or "vertical direction".
`
`Claim Rejections - 35 USC § 103
`
`3.
`
`The following is a quotation of 35 USC. 103(a) which forms the basis for all
`
`obviousness rejections set forth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in
`section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 3
`
`Art Unit: 2694
`
`such that the subject matter as a whole would have been obvious at the time the invention was made to a person
`having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the
`manner in which the invention was made.
`
`4.
`
`This application currently names joint inventors. In considering patentability of the
`
`claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various
`
`claims was commonly owned at the time any inventions covered therein were made absent any
`
`evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out
`
`the inventor and invention dates of each claim that was not commonly owned at the time a later
`
`invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c)
`
`and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
`
`5.
`
`Claims 1-2 are rejected under 35 U.S.C. 102(b) as being anticipated by Kasai et al (US
`
`Pub 2004/0140968 A1, hereinafter referred to Kasai (968)) in View of Yamashita et al (US Pub
`
`2005/0156828 A1).
`
`Regarding Claim 1, Kasai (968) teaches a display device (a self—luminous device display 22,
`
`Fig.1), comprising:
`
`a plurality of display elements arranged in matrix (EL element 40, Fig.2);
`
`a plurality of data lines for supplying display signal voltages to the plurality of display
`
`elements (Fig.2, data lines 23,24 supplying data signals 15 to pixels);
`
`a plurality of scan lines intersecting with the plurality of data lines (Fig.2, scan lines
`
`27, 28 intersecting with data lines 23, 24);
`
`a plurality of power supply lines intersecting with the plurality of scan lines (Fig.2,
`
`column organic EL drive voltage supply lines 29,30 intersecting with scan lines 27,28);
`
`a data line drive circuit for outputting emission control voltages for controlling light
`
`emission of the plurality of display elements during a retrace period during which the
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 4
`
`Art Unit: 2694
`
`display signal voltages are not output (paragraph [0005], a data drive circuit is designed to
`
`output gray scale voltages according to the input display data when the input display data is
`
`present and a sweep voltage during a blanking period when no input display data is present); and
`
`an emission power supply circuit (drive voltage generation circuit 18, Fig.1) for
`
`supplying power supply voltages for the light emission of the plurality of display elements
`
`to the plurality of power supply lines from at least one of external sides of a display region
`
`corresponding to a group including the plurality of display elements (Fig.1, paragraph
`
`[0041], the drive voltage generation circuit 18 generates an organic EL drive voltage 19 to turn
`
`on organic EL elements),
`
`Kasai (968) does not expressly disclose the emission control voltages different among
`
`the plurality of data lines.
` (a)
`
`ramp voltage period
`
` :
`
`SCAN
`
`I
`
`i ALIGHT '
`{(PERIOD DIFFERS FORI
`' DIFFERENT PIXEL$)
`l
`
`(b) VOLTAGE
`
`RAMP
`
`H i
`ALIGIIT
`I
`
`i
`
`' '
`
`1—-‘*‘Dfi
`' ALIGHT
`
`Fig.9
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 5
`
`Art Unit: 2694
`
`Yamashita teaches the emission control voltages different among the plurality of data
`
`lines (In the same field of invention, paragraph [0081], Fig.9, Yamashita discloses a OLED
`
`display and a method of generating ramp voltage in a ramp voltage period as illustrated in Fig.9
`
`above. Particularly, ramp voltages applied for each of pixels color R,G,B are different so as to
`
`change the emission period "ALIGHT” accordingly. In other words, Yamashita describes a
`
`method of controlling the emission period by changing the widths of the ramp voltages).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`the art to apply the teaching of Yamashita of making the widths of the sweep voltages of the
`
`OLED display of Kasai being different. The suggestion/motivation would have been in order to
`
`adjust the luminance of pixels without changing input data voltages (e. g. for obtaining a white
`
`balance, Yamashita, paragraph [0081]).
`
`Regarding Claim 2, Kasai (968) and Yamashita teach the display device according to Claim 1
`
`as described above. Kasai (968) further teaches the emission control voltages comprise a
`
`triangular wave (Fig.4, the sweep voltage has a triangular shape).
`
`6.
`
`Claims 3-6 are rejected under 35 U.S.C. 103(a) as being unpatentable over Kasai et al
`
`(US Pub 2004/0140968 A1, hereinafter referred to Kasai (968)) in view of Yamashita et al
`
`(US Pub 2005/0156828 A1) as applied to claims 1,2 above, and further in view of Kasai et al
`
`(US Pub 2007/0188423 A1, hereinafter referred to Kasai (423)).
`
`Regarding Claim 3, Kasai (968) and Yamashita teach the display device according to Claim 1
`
`as described above. Kasai (968) and Yamashita do not teach the emission control voltages,
`
`which are generated by the data line drive circuit for the plurality of data lines, are
`
`controlled so that emission intensities of the plurality of display elements are provided with
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 6
`
`Art Unit: 2694
`
`a gradient in an arrangement direction of the plurality of power supply lines (Particularly,
`
`Kasai (968) and Yamashita do not teach the widths of the sweep voltages are decreasing along
`
`with the arrangement direction of the plurality of power supply lines).
`
`
`
`top pixel
`
`FIG.BB '"
`
`center pixel
`
` F lG.6A
`
`I480
`
`FIG.6C
`
`bottom pixel
`
`p480
`
`Kasai (423) teaches emission intensities of the plurality of display elements are
`
`provided with a gradient in an arrangement direction of the plurality of power supply lines
`
`(Fig.6A—6F, paragraph [0038], Kasai (423) discloses a method of adjusting the emission period
`
`of pixels in arrangement direction of power supply lines so as to compensate for the voltage drop
`
`by the wiring resistance (paragraph [0014]). Numeral 83 denotes a relationship between position
`
`of pixel from power supply point vs. voltage drop. For instance, Fig.6A, a pixel located on top is
`
`farthest from the power supply point, then the light emission time period is longest (numeral 85).
`
`Fig.6B, for a pixel located at the center, the light emission time period 88 is shorter than the top
`
`pixel. Fig.6C, a pixel located on the bottom is closest to the power supply point, then the light
`
`emission time period of the bottom pixel 91 is shortest).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`the art to modify the OLED display of Kasai (968) and Yamashita such that the light emission
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 7
`
`Art Unit: 2694
`
`time period of pixels is decreasing from a top pixel to a bottom pixel as taught by Kasai (423).
`
`Thus, a skilled person in the art would have been motivated to make the widths of the sweep
`
`voltages applied to the top pixel through the bottom pixel being decreased. The
`
`suggestion/motivation would have been in order to compensate for voltage drop by wiring
`
`resistance without changing input data voltages.
`
`Regarding Claim 4, Kasai (968) and Yamashita teach the display device according to Claim 2
`
`as described above. Kasai (968) and Yamashita further teach the triangular wave of the
`
`emission control voltages, which are generated by the data line drive circuit for the
`
`plurality of data lines, has a width controlled (referred to analysis of Claim 1). Kasai (968)
`
`and Yamashita do not teach the emission control voltages are controlled so that emission
`
`intensities of the plurality of display elements are provided with a gradient in an
`
`arrangement direction of the plurality of power supply lines (Particularly, Kasai (968) and
`
`Yamashita do not teach the widths of the sweep voltages are decreasing in column—wise
`
`direction).
`
`F IG.6A
`
`top pixel
`
`FIG.BB '"
`
` |1wWMMMMMWMM
`
`center pixel
`
`FIG.6C
`
`I480
`
`bottom pixel
`
`p480
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 8
`
`Art Unit: 2694
`
`Kasai (423) teaches emission intensities of the plurality of display elements are
`
`provided with a gradient in an arrangement direction of the plurality of power supply lines
`
`(Fig.6A—6F, paragraph [0038], Kasai (423) discloses a method of adjusting the emission period
`
`of pixels in arrangement direction of power supply lines so as to compensate for the voltage drop
`
`by the wiring resistance (paragraph [0014]). Numeral 83 denotes a relationship between a
`
`position of pixel from power supply point vs. voltage drop. For instance, Fig.6A, a pixel located
`
`on top is farthest from the power supply point, then the light emission time period is longest
`
`(numeral 85). Fig.6B, for a pixel located at the center, the light emission time period 88 is shorter
`
`than the top pixel. Fig.6C, a pixel located on the bottom is closest to the power supply point, then
`
`the light emission time period of the bottom pixel 91 is shortest).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`the art to modify the OLED display of Kasai (968) and Yamashita such that the light emission
`
`time period of pixels is decreasing from a top pixel to a bottom pixel as taught by Kasai (423).
`
`Thus, a skilled person in the art would have been motivated to make the widths of the sweep
`
`voltages applied to the top pixel through the bottom pixel being decreased. The
`
`suggestion/motivation would have been in order to compensate for voltage drop by wiring
`
`resistance without changing input data voltages.
`
`Regarding Claim 5; Kasai (968), Yamashita, and Kasai (423) teach the display device
`
`according to claim 3 as described above. Kasai (968), Yamashita, and Kasai (423) further teach
`
`the gradient of the emission intensities of the plurality of display elements has a direction
`
`for eliminating a voltage drop of the plurality of power supply lines (Referred to analysis of
`
`Claim 3 and Kasai (423), paragraph [0047]).
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 9
`
`Art Unit: 2694
`
`Regarding Claim 6; Kasai (968) and Yamashita teach the display device according to claim 1 as
`
`described above. Kasai (968) and Yamashita do not teach the data line drive circuit comprises
`
`means for identifying a luminance gradient based on input display data.
`
`Kasai (423) teaches the data line drive circuit comprises means for identifying a
`
`luminance gradient based on input display data (Paragraph [0054], a luminance measuring
`
`circuit is provided to measure the display luminance of each pixel or each column of pixels or
`
`each row of pixels from the gray scale data).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`the art to include the luminance measuring circuit as taught by Kasai (423) into the OLED
`
`display of Kasai (968) and Yamashita. The suggestion/motivation would have been in order to
`
`determine light emission control signals so as to compensate for voltage drop.
`
`7.
`
`Claims 7-14 are rejected under 35 U.S.C. 103(a) as being unpatentable over Kasai et al
`
`(US Pub 2004/0140968 A1, referred to Kasai (968)) in view of Yamashita et al (US Pub
`
`2005/0156828 A1) and Kasai et al (US Pub 2007/0188423 A1, referred to Kasai (423)).
`
`Regarding Claim 7, Kasai (968) teaches a display device (a self—luminous device display 22,
`
`Fig.1), comprising:
`
`a plurality of display elements arranged in matrix (EL element 40, Fig.2);
`
`a plurality of data lines for supplying display signal voltages to the plurality of display
`
`elements (Fig.2, data lines 23,24 supplying data signals 15 to pixels);
`
`a plurality of scan lines intersecting with the plurality of data lines (Fig.2, scan lines
`
`27, 28 intersecting with data lines 23, 24);
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 10
`
`Art Unit: 2694
`
`a plurality of power supply lines intersecting with the plurality of scan lines (Fig.2,
`
`column organic EL drive voltage supply lines 29,30 intersecting with scan lines 27,28);
`
`a data line drive circuit for outputting emission control voltages for controlling light
`
`emission of the plurality of display elements during a retrace period during which the
`
`display signal voltages are not output (paragraph [0005], a data drive circuit is designed to
`
`output gray scale voltages according to the input display data when the input display data is
`
`present and a sweep voltage during a blanking period when no input display data is present); and
`
`an emission power supply circuit (drive voltage generation circuit 18, Fig.1) for
`
`supplying power supply voltages for the light emission of the plurality of display elements
`
`to the plurality of power supply lines from at least one of external sides of a display region
`
`corresponding to a group including the plurality of display elements (Fig. 1, paragraph
`
`[0041], the drive voltage generation circuit 18 generates an organic EL drive voltage 19 to turn
`
`on organic EL elements),
`
`Kasai (968) does not expressly disclose the emission control voltages different among
`
`the plurality of data lines.
`
`Yamashita teaches the emission control voltages different among the plurality of data
`
`lines (In the same field of invention, paragraph [0081], Fig.9, Yamashita discloses a OLED
`
`display and a method of generating ramp voltage in a ramp voltage period as illustrated in Fig.9
`
`above. Particularly, ramp voltages applied for each of pixels color R,G,B are different so as to
`
`change the emission period "ALIGHT” accordingly. In other words, Yamashita describes a
`
`method of controlling the emission period by changing the widths of the ramp voltages).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 11
`
`Art Unit: 2694
`
`the art to apply the teaching of Yamashita of making the widths of the sweep voltages of the
`
`OLED display of Kasai being different. The suggestion/motivation would have been in order to
`
`adjust the luminance of pixels without changing input data voltages (e.g. for obtaining a white
`
`balance, Yamashita, paragraph [0081]).
`
`Kasai (968) and Yamashita do not teach the data line drive circuit generates and outputs
`
`the emission control voltages which are emission control voltages for eliminating a
`
`luminance gradient of the plurality of display elements in an arrangement direction of the
`
`plurality of power supply lines (Particularly, Kasai (968) and Yamashita do not teach the
`
`widths of the sweep voltages are decreasing in a vertical direction in which the power supply
`
`lines are arranged).
`
`Kasai (423) teaches emission intensities of the plurality of display elements are
`
`provided with a gradient in an arrangement direction of the plurality of power supply lines
`
`(Fig.6A—6F, paragraph [0038], Kasai (423) discloses a method of adjusting the emission period
`
`of pixels in arrangement direction of power supply lines so as to compensate for the voltage drop
`
`by the wiring resistance (paragraph [0014]). Numeral 83 denotes a relationship between a
`
`position of pixel from power supply point vs. voltage drop. For instance, Fig.6A, a pixel located
`
`on top is farthest from the power supply point, then the light emission time period is longest
`
`(numeral 85). Fig.6B, for a pixel located at the center, the light emission time period 88 is shorter
`
`than the top pixel. Fig.6C, a pixel located on the bottom is closest to the power supply point, then
`
`the light emission time period of the bottom pixel 91 is shortest).
`
`At the time of invention was made, it would have been obvious to one of ordinary skill in
`
`the art to modify the OLED display of Kasai (968) and Yamashita such that the light emission
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 12
`
`Art Unit: 2694
`
`time period of pixels is decreasing from a top pixel to a bottom pixel as taught by Kasai (423).
`
`Thus, a skilled person in the art would have been motivated to make the widths of the sweep
`
`voltages applied to the top pixel through the bottom pixel being decreased. The
`
`suggestion/motivation would have been in order to compensate for voltage drop by wiring
`
`resistance without changing input data voltages.
`
`Regarding Claim 8; Kasai (968), Yamashita, and Kasai (423) teach the display device
`
`according to claim 7 as described above. Kasai (968) further teaches the emission control
`
`voltages comprise a triangular wave (Fig.4, the sweep voltage has a triangular shape).
`
`Regarding Claim 9; Kasai (968), Yamashita, and Kasai (423) teach the display device
`
`according to claim 8 as described above. Kasai (968), Yamashita, and Kasai (423) further teach
`
`the triangular wave of the emission control voltages, which are generated by the data line
`
`drive circuit for the plurality of data lines, has a width controlled so that emission
`
`intensities of the plurality of display elements are provided with a gradient in the
`
`arrangement direction of the plurality of power supply lines (referred to analysis of Claim 7).
`
`Regarding Claim 10; Kasai (968), Yamashita, and Kasai (423) teach the display device
`
`according to claim 7 as described above. Kasai (423) further teaches the data line drive circuit
`
`comprises means for identifying a luminance gradient based on input display data
`
`(Paragraph [0054], a luminance measuring circuit is provided to measure the display luminance
`
`of each pixel or each column of pixels or each row of pixels from the gray scale data).
`
`Regarding Claim 11, Kasai (968) teaches a display device (a self—luminous device display 22,
`
`Fig.1), comprising:
`
`a plurality of display elements arranged in matrix (EL element 40, Fig.2);
`
`

`

`Application/Control Number: 12/571 ,536
`
`Page 13
`
`Art Unit: 2694
`
`a plurality of data lines for supplying display signal voltages to the plurality of display
`
`elements (Fig.2, data lines 23,24 supplying data signals 15 to pixels);
`
`a plurality of scan lines intersecting with the plurality of data lines (Fig.2, scan lines
`
`27, 28 intersecting with data lines 23, 24);
`
`a plurality of power supply lines intersecting with the plurality of scan lines (Fig.2,
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`column organic EL drive voltage supply lines 29,30 intersecting with scan lines 27,28);
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`a data line drive circuit for outputting emission control voltages for controlling light
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`emission of the plurality of display elements during a retrace period during which the
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`display signal voltages are not output (paragraph [0005], a data drive circuit is designed to
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`output gray scale voltages according to the input display data when the input display data is
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`present and a sweep voltage during a blanking period when no input display data is present); and
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`an emission power supply circuit (drive voltage generation circuit 18, Fig. 1) for
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`supplying power supply voltages for the light emission of the plurality of display elements
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`to the plurality of power supply lines from at least one of external sides of a display region
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`corresponding to a group including the plurality of display elements (Fig. 1, paragraph
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`[0041], the drive voltage generation circuit 18 generates an organic EL drive voltage 19 to turn
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`on organic EL elements),
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`Kasai (968) does not teach luminance gradient identification means for identifying a
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`luminance gradient caused by a voltage drop of the plurality of power supply lines, the
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`data line drive circuit generates and outputs the emission control voltages different among
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`the plurality of data lines so as to eliminate the luminance gradient of the plurality of
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`display elements, which is identified by the luminance gradient identification means
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`(Particularly, Kasai (968) and Yamashita do not teach the widths of the sweep voltages are
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`decreasing in a vertical direction in which the power supply lines are arranged).
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`FIG.2
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`
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`Kasai (423) teaches luminance gradient identification means for identifying a
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`luminance gradient caused by a voltage drop of the plurality of power supply lines
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`(paragraph [0054], a luminance measuring circuit is provided to measure the display luminance
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`of each pixel or each column of pixels or each row of pixels from the gray scale data) the data
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`line drive circuit generates and outputs the emission control voltages different among the
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`plurality of data lines so as to eliminate the luminance gradient of the plurality emission
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`intensities of the plurality of display elements are provided with a gradient in an
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`arrangement direction of the plurality of power supply lines (Fig.6A-6F, paragraph [0038],
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`Kasai (423) discloses a method of adjusting the emission period of pixels in arrangement
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`direction of power supply lines so as to compensate for the voltage drop by the wiring resistance
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`(paragraph [0014]). Numeral 83 denotes a relationship between a position of pixel from power
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`supply point vs. voltage drop. For instance, Fig.6A, a pixel located on top is farthest from the
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`power supply point, then the light emission time period is longest (numeral 85). Fig.6B, for a
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`pixel located at the center, the light emission time period 88 is shorter than the top pixel. Fig.6C,
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`a pixel located on the bottom is closest to the power supply point, then the light emission time
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`period of the bottom pixel 91 is shortest. As a skilled person in the art would have appreciated, in
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`a case that the power supply is connected with the organic EL drive voltage supply line 32 on the
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`right side as illustrated in Fig.2 above, the relationship between position of pixel in one row and
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`voltage drop would be the same as described in column—wise direction. More specifically, the
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`first—column first—row pixel located farthest from the power supply point has a relatively low
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`display luminance level, then the light emission time period should be longest. The second—
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`column first—row pixel is located closer to the power supply point, then the light emission time
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`period should shorter than the first—column first—row pixel. It would be similar to determine the
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`light emission time period for remaining pixels from left to right. The last—column first—row pixel
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`is located closest to the power supply point, then the light emission time period should be
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`shortest).
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`At the time of invention was made, it would have been obvious to one of ordinary skill in
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`the art to modify the OLED display of Kasai (968) to include the luminance measuring circuit
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`for detecting luminance of each pixels and a method of Kasai (423) of changing the light
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`emission time period of pixels in row—wise direction such that the light emission time period of
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`pixels is decreasing from left to right. The suggestion/motivation would have been in order to
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`compensate for voltage drop by wiring resistance.
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`Kasai (968) and Kasai (423) do not expressly disclose the emission control voltages
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`different among the plurality of data lines.
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`Yamashita teaches the emission control voltages different among the plurality of data
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`lines (In the same field of invention, paragraph [0081], Fig.9, Yamashita discloses a OLED
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`display and a method of generating ramp voltage in a ramp voltage period as illustrated in Fig.9
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`above. Particularly, ramp voltages applied for each of pixels color R,G,B are different so as to
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`change the emission period "ALIGHT” accordingly. In other words, Yamashita describes a
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`method of controlling the emission period by changing the widths of the ramp voltages without
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`changing of data voltages).
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`At the time of invention was made, it would have been obvious to one of ordinary skill in
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`the art to apply the teaching of Yamashita of making the widths of the sweep voltages of the
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`OLED display of Kasai being different. The suggestion/motivation would have been in order to
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`adjust the luminance of pixels without changing input data voltages.
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`Regarding Claim 12; Kasai (968), Kasai (423), and Yamashita teach the display device
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`according to Claim 11 as described above. Kasai (968) further teaches the emission control
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`voltages comprise a triangular wave (Fig.4, the sweep voltage has a triangular shape).
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`Regarding Claim 13; Kasai (968), Kasai (423), and Yamashita teach the display device
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`according to Claim 12 as described above. Kasai (968), Yamashita, and Kasai (423) further teach
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`the triangular wave of the emission control voltages, which are generated by the data line
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`drive circuit for the plurality of data lines, has a width controlled so that emission
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`intensities of the plurality of display elements are provided with a gradient in the
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`arrangement direction of the plurality of power supply lines (referred to analysis of Claims
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`11 & 12).
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`Regarding Claim 14; Kasai (968), Kasai (423), and Yamashita teach the display device
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`according to Claim ll as described above. Kasai (423) further teaches the luminance gradient
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`identification means identifies the luminance gradient in an arrangement direction of the
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`plurality of power supply lines based on input display data (Paragraph [0054], a luminance
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`measuring circuit is provided to measure the display luminance of each pixel or each column of
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`pixels or each row of pixels from the gray scale data).
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`Conclusion
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to NGUYEN H. TRUONG whose telephone number is (571)270—
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`1630. The examiner can normally be reached on Monday—Friday, 8—4z30.
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, ALEXANDER S. BECK can be reached on 571—272—7765. The fax phone number
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`for the organization where this application or proceeding is assigned is 571—273—8300.
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`Information regarding the status of an applicat