`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria1 Virginia 22313- 1450
`wwwnsptogov
`
`APPLICATION NO.
`
`
`
`
` F ING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`
`
`
`CONF {MATION NO.
`
`12/792,886
`
`06/03/2010
`
`Yoshihisa OOISHI
`
`1497.50812X00
`
`5575
`
`20457
`
`7590
`
`04/01/2014
`
`ANTONELLLTERRY,STOUT&KRAUS,LLP
`1300 NORTH SEVENTEENTH STREET
`SUITE 1800
`ARLINGTON, VA 22209-3873
`
`stm, RAM A
`
`2691
`
`MAIL DATE
`
`04/01/2014
`
`PAPER NUMBER
`
`DELIVERY MODE
`
`PAPER
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL—90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 12/792,886 OOISHI ET AL.
`
`
`AIA (First Inventor to File)
`Art Unit
`Examiner
`Office Action Summary
`
`
`RAM MISTRY its“ 2691
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1 .704(b).
`
`In no event, however, may a reply be timely filed
`
`Status
`
`1)IZI Responsive to communication(s) filed on 12/16/2013.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2b)|:l This action is non-final.
`2a)|Z| This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
`
`; the restriction requirement and election have been incorporated into this action.
`
`4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`
`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims*
`
`5)IZI Claim(s) 1 and 5-12 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`is/are allowed.
`6)I:I Claim(s)
`7)|Z| Claim(s) 1and 5-12is/are rejected.
`8)|:I Claim(s)_ is/are objected to.
`
`
`are subject to restriction and/or election requirement.
`9)I:I Claim((s)
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`hit
`:/'/\W¢W.LISI>I‘.0. ovI’ atentS/init events/
`
`
`
`h/index.‘s or send an inquiry to PPI-iieedback{®usgtc.00v.
`
`Application Papers
`
`10)I:l The specification is objected to by the Examiner.
`11)I:l The drawing(s) filed on
`is/are: a)I:I accepted or b)I:I objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`
`12)I:| Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`
`a)I:l All
`
`b)|:l Some” c)I:l None of the:
`
`1.I:I Certified copies of the priority documents have been received.
`2.|:l Certified copies of the priority documents have been received in Application No.
`3.|:| Copies of the certified copies of the priority documents have been received in this National Stage
`
`application from the International Bureau (PCT Rule 17.2(a)).
`** See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`
`
`3) D Interview Summary (PTO-413)
`1) E Notice of References Cited (PTO-892)
`Paper No(s)/Mai| Date.
`.
`.
`4) I:I Other'
`2) I] InformatIon DIsclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
`PTOL—326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mai| Date 20140324
`
`

`

`Application/Control Number: 12/792,886
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`Page 2
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`Art Unit: 2691
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`The present application is being examined under the pre-AIA first to invent provisions.
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`DETAILED ACTION
`
`1.
`
`Claims 1I 5-12 are pending in this application.
`
`Claim Rejections — 35 USC § 103
`
`2.
`
`The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all
`
`obviousness rejections set forth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described as set
`forth in section 102 of this title, if the differences between the subject matter sought to be patented and
`the prior art are such that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said subject matter pertains.
`Patentability shall not be negatived by the manner in which the invention was made.
`
`3.
`
`Claims 1I 5I 6I 7I 9I 10I 12 are rejected under 35 U.S.C. § 103(a) as being
`
`unpatentable over Hayashiguchi (US 5,742,269) in view of Tsumura (US
`
`2004/0041760).
`
`As to claim 1, Hayashiguchi (Figs. 2-4) teaches a liquid crystal display device
`
`(Fig. 3) comprising:
`
`a drive circuit (15); and
`
`a plurality of divided display sections (10A, 108) which are arranged parallel to
`
`each other in a predetermined direction (10A and 108 are arranged horizontally parallel
`
`to each other), wherein
`
`each divided display section comprises:
`
`

`

`Application/Control Number: 12/792,886
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`Page 3
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`Art Unit: 2691
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`a plurality of scanning lines (X1-Xm for each of 10A and 108) which are
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`connected to the drive circuit (15);
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`a plurality of data signal lines (Y1-Yn provided for each of 10A and 108) which
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`intersect with the plurality of scanning lines (X1-Xm), and are connected to the drive
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`circuit (15); and
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`a plurality of pixel circuits (Pixel circuits are located at the intersections of the X
`
`and Y lines) which are provided correspondingly to intersections of the scanning lines
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`and the data signal lines, the pixel circuit displaying gray level based on a data signal
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`which is supplied when the corresponding scanning line is selected and is supplied to
`
`the corresponding data signal line (This is the manner in which active matrix pixel
`
`circuits display images) [Col. 1, Lines 13-27; Col. 3, Lines 20-44],
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`the drive circuit sequentially selects the plurality of scanning lines included in
`
`each divided display section from a first scanning line of the plurality of scanning lines
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`(X1) [Col. 4, Lines 5-18], supplies the data signal to the data signal line included in the
`
`divided display section [Col. 4, Lines 18-25], and repeats the operations from the first
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`scanning line with a lapse of a predetermined period (Vertical Blanking Period) after
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`selecting a last scanning line of the plurality of scanning lines (Xm) (No scanning
`
`electrodes are turned on until the following frame pulse FP is provided. The period of
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`time between these two pulses is the Vertical Blanking Period and is present after the
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`last scanning line is scanned) [Col. 4, Lines 36-47].
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`

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`Application/Control Number: 12/792,886
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`Page 4
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`Art Unit: 2691
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`However, Hayashiguchi does not teach utilizing the average of data signals in
`
`order to determine the precharging signal. Hayashiguchi does teach the display
`
`sections as rejected above.
`
`On the other hand, Tsumura teaches based on an average of the data signals
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`which are supplied at a time of selecting the first scanning line which is included in one
`
`or more of the divided display sections (E.g. the current scanning line) and a third
`
`scanning line adjacent to the first scanning line (E.g. the scanning line before the
`
`current scanning line) (In the display of Hayashiguchi, this corresponds to the first
`
`scanning line of the second half of the display and the last scanning line of the first half
`
`of the display), the drive circuit supplies a signal potential to the data signal line and is
`
`arranged adjacent to a scanning line before selecting the first scanning line (Supplied as
`
`a precharge signal before driving the main signal as shown in Fig. 17. In addition, the
`
`precharge data can be composed of a column-direction average value of image data
`
`consisting of rows in the vicinity) [0032, 0137].
`
`That is, based on the value of a previous scan line, the precharge for the current
`
`scan line is determined. This, when applied to the dual display sections of
`
`Hayashiguchi, results in a system where the first scan line of the second display section
`
`is precharged based on an average value of the previous scan line and the current scan
`
`line.
`
`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the row average precharge of Tsumura with the display device of
`
`Hayashiguchi because the combination would allow for the utilization of a precharge
`
`

`

`Application/Control Number: 12/792,886
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`Page 5
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`Art Unit: 2691
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`value that better reflects adjacent pixels and drives the row of pixels to a value closer to
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`the intended display value in the area.
`
`As to claim 5, Hayashiguchi teaches all the elements of claim 1 above.
`
`Hayashiguchi also teaches wherein the plurality of scanning lines included in
`
`each divided display section are arranged in the predetermined direction in order that
`
`the scanning lines are selected by the drive circuit (Vertically arranged),
`
`wherein a first divided display section (10A) which is one of the plurality of the
`
`divided display sections and a second divided display section (1 OB) which is another
`
`one of the plurality of the divided display sections are adjacent to each other in a
`
`direction in which the data signal lines extend (Vertically adjacent),
`
`wherein, during a writing period corresponding to the first divided display section
`
`(When X1 -Xm are selected), the drive circuit sequentially selects the plurality of
`
`scanning lines included in the first divided display section from the first scanning line,
`
`supplies the data signal to the data signal line included in the divided display section
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`[Col. 4, Lines 5-18, 18-25], and, during a blanking period right after the writing period,
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`the drive circuit does not scan any of the data signal lines included in the first divided
`
`display section (No scanning electrodes are turned on until the following frame pulse FP
`
`is provided. The period of time between these two pulses is the Vertical Blanking Period
`
`and is present after the last scanning line is scanned) [Col. 4, Lines 36-47],
`
`wherein, during a writing period corresponding to the second divided display
`
`section (When X1 -Xm of 108 are selected), the drive circuit sequentially selects the
`
`

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`Application/Control Number: 12/792,886
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`Page 6
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`Art Unit: 2691
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`plurality of scanning lines included in the second divided display section from the first
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`scanning line, supplies the data signal to the data signal line included in the divided
`
`display section [Col. 4, Lines 5-18, 18-25], and during a blanking period right after the
`
`writing period, the drive circuit does not scan any of the data signal lines included in the
`
`second divided display section (No scanning electrodes are turned on until the following
`
`frame pulse FP is provided. The period of time between these two pulses is the Vertical
`
`Blanking Period and is present after the last scanning line is scanned) [Col. 4, Lines 36-
`
`47],
`
`wherein the writing periods and the blanking periods which are corresponding to
`
`the first and second divided display sections, respectively, are repeated (The display
`
`operation is repeated).
`
`However, Hayashiguchi does not teach utilizing another data signal in order to
`
`precharge a specific line of pixels. Hayashiguchi does teach the display sections as
`
`rejected above.
`
`On the other hand, Tsumura teaches wherein, based on the data signal which is
`
`supplied at the time of selecting at least one of the scanning lines (Based on a selection
`
`of a previous scan line), the drive circuit supplies the signal potential to the data signal
`
`line before selecting the first scanning line (Based on the average value of a previous
`
`scan line and a current scan line, the precharge data is determined) [0032, 0137].
`
`That is, based on the value of a previous scan line, the precharge for the current
`
`scan line is determined. This, when applied to the dual display sections of
`
`

`

`Application/Control Number: 12/792,886
`
`Page 7
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`Art Unit: 2691
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`Hayashiguchi, results in a system where the first scan line of the second display section
`
`is precharged based on an average value of the previous scan line and the current scan
`
`line.
`
`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the row average precharge of Tsumura with the display device of
`
`Hayashiguchi because the combination would allow for the utilization of a precharge
`
`value that better reflects adjacent pixels and drives the row of pixels to a value closer to
`
`the intended display value in the area.
`
`As to claim 6, Hayashiguchi teaches the dual display sections of claim 5 above.
`
`However, Hayashiguchi does not teach utilizing another data signal in order to
`
`precharge a specific line of pixels. Hayashiguchi does teach the display sections as
`
`rejected above.
`
`On the other hand, Tsumura teaches wherein, based on the data signal which is
`
`supplied at the time of selecting the last scanning lines (Based on a selection of a
`
`previous scan line), the drive circuit supplies the signal potential to the data signal line
`
`before selecting the first scanning line (Based on the average value of a previous scan
`
`line and a current scan line, the precharge data is determined) [0032, 0137].
`
`That is, based on the value of a previous scan line, the precharge for the current
`
`scan line is determined. This, when applied to the dual display sections of
`
`Hayashiguchi, results in a system where the first scan line of the second display section
`
`

`

`Application/Control Number: 12/792,886
`
`Page 8
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`Art Unit: 2691
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`is precharged based on an average value of the previous scan line and the current scan
`
`line.
`
`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the row average precharge of Tsumura with the display device of
`
`Hayashiguchi because the combination would allow for the utilization of a precharge
`
`value that better reflects adjacent pixels and drives the row of pixels to a value closer to
`
`the intended display value in the area.
`
`As to claim 7, Hayashiguchi and Tsumura teach all the limitations of claims 1
`
`and 5 above.
`
`In addition, Hayashiguchi also teaches a first scanning line included in the
`
`second divided display section and a third scanning line (scanning line above the first
`
`one in the second divided display section) that would be driven in the same manner as
`
`rejected above in claims 1 and 5.
`
`As to claim 9, Hayashiguchi teaches wherein the length of the pre-data output
`
`period is equal to a horizontal scanning period (Fig. 4 — Pre-data is displayed at the
`
`horizontal duration before the vertical blanking period ends).
`
`As to claim 10, Hayashiguchi teaches wherein the drive circuit comprises a
`
`vertical drive circuit (19) driving the plurality of scanning lines, a first data line drive
`
`circuit (17A) driving the plurality of data signal lines included in the first divided display
`
`

`

`Application/Control Number: 12/792,886
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`Page 9
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`Art Unit: 2691
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`section (10A) and a second data line drive circuit (178) driving the plurality of data
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`signal lines included in the second divided display section (1 OB).
`
`As to claim 12, Hayashiguchi teaches wherein the drive circuit supplies a signal
`
`potential to the data signal lines included in the second divided display section during a
`
`pre-data signal output period (Fig. 4 — During the horizontal duration immediately before
`
`frame pulse FP) which is within the blanking period (Vertical blanking period)
`
`corresponding to the second divided display section (1 OB).
`
`However, Hayashiguchi does not teach utilizing image data from a plurality of
`
`rows in order to determine the precharging signal. Hayashiguchi does teach the display
`
`sections as rejected above.
`
`On the other hand, Tsumura teaches based on image data for a plurality of rows,
`
`the drive circuit supplies a pre-data signal to the data signal line (Supplied as a
`
`precharge signal before driving the main signal as shown in Fig. 17. In addition, the
`
`precharge data can be composed of a column-direction average value of image data
`
`consisting of rows in the vicinity) [0032, 0137].
`
`That is, based on the value of a previous scan line, the precharge for the current
`
`scan line is determined. This, when applied to the dual display sections of
`
`Hayashiguchi, results in a system where the first scan line of the second display section
`
`is precharged based on an average value of the previous scan line and the current scan
`
`line.
`
`

`

`Application/Control Number: 12/792,886
`
`Page 10
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`Art Unit: 2691
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`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the row average precharge of Tsumura with the display device of
`
`Hayashiguchi because the combination would allow for the utilization of a precharge
`
`value that better reflects adjacent pixels and drives the row of pixels to a value closer to
`
`the intended display value in the area.
`
`4.
`
`Claims 8, 11 are rejected under 35 U.S.C. § 103(a) as being unpatentable
`
`over Hayashiguchi (US 5,742,269) in view of Tsumura (US 2004/0041760), further
`
`in view of Arimoto (US 6,989,812).
`
`As to claim 8, Hayashiguchi teaches the divided display sections of claim 7
`
`above.
`
`However, Hayashiguchi and Tsumura do not teach the writing period of the
`
`second divided display section and the blanking period of the first divided display
`
`section starts at the same time.
`
`On the other hand, Arimoto (Fig. 26) teaches wherein the writing period of the
`
`second divided display section (E.g. writing period for Gate pulse section 9-12) and the
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`blanking period of the first divided display section starts at the same time (E.g. Blanking
`
`pulses applied to Gate pulse section 1-4).
`
`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the simultaneous time periods of Arimoto with the display device
`
`of Hayashiguchi, as modified by Tsumura, because the combination would allow for
`
`

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`Application/Control Number: 12/792,886
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`Page 11
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`Art Unit: 2691
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`quicker driving of a display, as initiating two periods simultaneously shortens the
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`transition time between two subsequent driving periods.
`
`As to claim 11, Hayashiguchi and Tsumura teach the display device of claim 7
`
`above.
`
`Hayashiguchi also teaches wherein each of the plurality of pixel circuits are
`
`surrounded by two neighboring scanning lines (Scanning line X on top and bottom) and
`
`two neighboring data signal lines (Data line Y on both sides of the pixel).
`
`However, Hayashiguchi and Tsumura do not specifically teach common
`
`electrodes.
`
`On the other hand, Arimoto (Fig. 1) teaches a plurality of common signal lines
`
`(Lines from 105) which are arranged parallel to the plurality of scanning lines (Parallel to
`
`GL),
`
`wherein each of the plurality of pixel circuits comprises a pixel electrode which is
`
`electrically connected to the data signal lines and a common electrode which is
`
`connected to the common signal lines (The pixel is connected to the data signal lines
`
`through the driving transistor and to the common electrode on the other side) [Col. 1,
`
`Lines 31 -45].
`
`It would have been obvious to a person of ordinary skill in the art, at the time of
`
`the invention, to utilize the pixel structure of Arimoto with the display device of
`
`Hayashiguchi, as modified by Tsumura, because the utilization of a common electrode
`
`

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`Application/Control Number: 12/792,886
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`Page 12
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`Art Unit: 2691
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`driving section would allow for the ability to control the differential voltage across the
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`liquid crystal, allowing for further control over the displayed image.
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`Response to Arguments
`
`5.
`
`Applicant's arguments with respect to claims 1, 5-12 have been considered but
`
`are moot in view of the new ground(s) of rejection based on the references Tsumura
`
`
`and Arimoto.
`
`Conclusion
`
`Applicant's amendment necessitated the new ground(s) of rejection presented in this
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`Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a).
`
`Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
`
`A shortened statutory period for reply to this final action is set to expire THREE
`
`MONTHS from the mailing date of this action.
`
`In the event a first reply is filed within
`
`TWO MONTHS of the mailing date of this final action and the advisory action is not
`
`mailed until after the end of the THREE-MONTH shortened statutory period, then the
`
`shortened statutory period will expire on the date the advisory action is mailed, and any
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`extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of
`
`the advisory action.
`
`In no event, however, will the statutory period for reply expire later
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`than SIX MONTHS from the date of this final action.
`
`Inquiry
`
`

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`Application/Control Number: 12/792,886
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`Page 13
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`Art Unit: 2691
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`Any inquiry concerning this communication or earlier communications from the
`
`examiner should be directed to RAM A. MISTRY whose telephone number is (571) 270-
`
`3913. The examiner can normally be reached on Monday - Thursday (7 am - 3:30 pm
`
`EST).
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
`
`supervisor, Chanh D. Nguyen can be reached on (571) 272-7772. The fax phone
`
`number for the organization where this application or proceeding is assigned is 571 -
`
`273-8300.
`
`Information regarding the status of an application may be obtained from the
`
`Patent Application Information Retrieval (PAIR) system. Status information for
`
`published applications may be obtained from either Private PAIR or Public PAIR.
`
`Status information for unpublished applications is available through Private PAIR only.
`
`For more information about the PAIR system, see http://pair-direct.uspto.gov. Should
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`you have questions on access to the Private PAIR system, contact the Electronic
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`Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a
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`USPTO Customer Service Representative or access to the automated information
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`system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
`
`/Ram A Mistry/
`Examiner, Art Unit 2691
`
`/CHANH NGUYEN/
`
`Supervisory Patent Examiner, Art Unit 2691
`
`

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`Application/Control Number: 12/792,886
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`Page 14
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`Art Unit: 2691
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