`
`UNITED STATES PATENT AND TRADEMARK OFFICE
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`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria1 Virginia 22313- 1450
`www.uspto.gov
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`APPLICATION NO.
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` F ING DATE
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`FIRST NAMED INVENTOR
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`ATTORNEY DOCKET NO.
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`
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`CONF {MATION NO.
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`13/245,914
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`09/27/2011
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`Shigetomi TOKUNAGA
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`MAT—10511US
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`7546
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`EXAMINER
`RATNERPRESTIA —
`06’2““ —
`7590
`52473
`PO. BOX 980
`ROIAs, BERNARD
`VALLEY FORGE, PA 19482-0980
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`PAPER NUMBER
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`ART UNIT
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`2832
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`NOT *ICATION DATE
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`DELIVERY MODE
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`06/26/2013
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`ELECTRONIC
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`Please find below and/or attached an Office communication concerning this application or proceeding.
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`The time period for reply, if any, is set in the attached communication.
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`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`following e—mail address(es):
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`ptocorrespondence @ratnerprestia.c0m
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`PTOL—90A (Rev. 04/07)
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`

`

`
`
`Applicant(s)
`Application No.
` 13/245,914 TOKUNAGA, SHIGETOMI
`
`
`AIA (First Inventorto File)
`Art Unit
`Examiner
`Office Action Summary
`
`
`BERNARD ROJAS first“ 2832
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
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`
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE 3 MONTH(S) OR THIRTY (30) DAYS,
`WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR 1.136(a).
`In no event however may a reply be timely filed
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`-
`-
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`Status
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`1)I:I Responsive to communication(s) filed on
`[I A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
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`2b)lX| This action is non-final.
`a)I:| This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
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`; the restriction requirement and election have been incorporated into this action.
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`4)|:I Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under EX parte Quay/e, 1935 CD. 11, 453 O.G. 213.
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`Disposition of Claims
`5)|XI Claim(s) L5is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`6)|:l Claim(s)_ is/are allowed.
`7)IZ| Claim(s 1,2,5 and6Is/are rejected.
`)
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`8)IZ| Claim(s) 3 and 4 is/are objected to.
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`9)|:l Claim((s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
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`participating intellectual property office for the corresponding application. For more information, please see
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`
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`://www.usoto. ov/ atents/init events"
`h/index.‘s orsend an inquiry to PRI-Ifeedback{<‘buspto.qov.
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`htt
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`Application Papers
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`10)I:I The specification is objected to by the Examiner.
`11)|Z| The drawing(s) filed on 27 Sthember 2011 is/are: a)IXI accepted or b)I:I objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
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`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
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`Priority under 35 U.S.C. § 119
`12)IZI Acknowledgment is made of a claim for foreign priority under 35 U.S.C. §119(a)-(d) or (f).
`Certified copies:
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`b)I:I Some * c)I:I None of the:
`a)le AII
`1.IZI Certified copies of the priority documents have been received.
`2.I:I Certified copies of the priority documents have been received in Application No.
`3.|:I Copies of the certified copies of the priority documents have been received in this National Stage
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`application from the International Bureau (PCT Rule 17.2(a)).
`* See the attached detailed Office action for a list of the certified copies not received.
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`Interim copies:
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`a)|:l AII
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`b)I:I Some
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`c)I:I None of the:
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`Interim copies of the priority documents have been received.
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`Attachment(s)
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`1) E Notice of References Cited (PTO-892)
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`3) I] Interview Summary (PTO-413)
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`Paper NOISIIMa” Date —
`PTO/SB/08
`t
`St t
`I
`D'
`t'
`f
`2 IXI I
`)
`4) I:I Other:
`a emen (s)(
`Isc osure
`n orma Ion
`)
`Paper No(s)/Mai| Date 09272011.
`US. Patent and Trademark Office
`PTOL-326 (Rev. 03-13)
`
`Part of Paper No./Mai| Date 20130603
`
`Office Action Summary
`
`

`

`Application/Control Number: 13/245,914
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`Page 2
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`Art Unit: 2832
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`DETAILED ACTION
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`Priority
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`Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which
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`papers have been placed of record in the file.
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`Information Disclosure Statement
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`The information disclosure statement (IDS) submitted on 09/27/2011 has been
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`considered by the examiner.
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`The drawings filed on 09/27/2011 have been accepted by the examiner.
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`Drawings
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`Claim Rejections - 35 USC § 112
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`The following is a quotation of 35 U.S.C. 112(b):
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`(B) CONCLUSION—The specification shall conclude with one or more claims
`particularly pointing out and distinctly claiming the subject matter which the inventor or a
`joint inventor regards as the invention.
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`The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph:
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`The specification shall conclude with one or more claims particularly pointing out
`and distinctly claiming the subject matter which the applicant regards as his invention.
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`Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second
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`paragraph, as being indefinite for failing to particularly point out and distinctly claim the
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`subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards
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`

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`Application/Control Number: 13/245,914
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`Page 3
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`Art Unit: 2832
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`as the invention.
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`It is unclear what is being claimed by ”wherein the semiconductor
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`element is mounted and the highest on the upper face of the printed circuit board.”
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`Claim Rejections - 35 USC § 103
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`The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all
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`obviousness rejections set forth in this Office action:
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`(a) A patent may not be obtained though the invention is not identically disclosed or described as set
`forth in section 102 of this title, if the differences between the subject matter sought to be patented and
`the prior art are such that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said subject matter pertains.
`Patentability shall not be negatived by the manner in which the invention was made.
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`This application currently names joint inventors.
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`In considering patentability of
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`the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of
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`the various claims was commonly owned at the time any inventions covered therein
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`were made absent any evidence to the contrary. Applicant is advised of the obligation
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`under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was
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`not commonly owned at the time a later invention was made in order for the examiner to
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`consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e),
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`(f) or (g)
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`prior art under 35 U.S.C. 103(a).
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`Claims 1, 2, 5 and 6 are rejected under 35 U.S.C. 103(a) as being unpatentable
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`over Pearson et al. [US 2005/0067178] in view of Applicant Admitted Prior Art Figure 7.
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`Claim 1, Pearson et al. discloses an electronic circuit device [figure 4c]
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`comprising: a printed circuit board [50] including an upper face and a lower face, both
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`the faces available for mounting a component; a semiconductor element
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`[56/60]
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`

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`Application/Control Number: 13/245,914
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`Page 4
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`Art Unit: 2832
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`mounted on the upper face [figurer 4a]; a housing for accommodating the printed circuit
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`board and having an opening in one of the surfaces; a plurality of bushings [16]
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`disposed inside the housing for underpinning the printed circuit [50] board in a vertical
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`direction; an aluminum plate [12] disposed vertically above the printed circuit board [50]
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`and closing the opening; and an insulating sheet
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`[72] disposed between the
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`semiconductor element [56/60] and the aluminum plate [12], wherein mounting of the
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`aluminum plate [12] causes the printed circuit board [50] to compress the bushings [16],
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`and bring the semiconductor element [56/60], the aluminum plate [12] and the insulating
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`sheet [72] into pressed contact with one another [figure 4c].
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`Pearson et al. fails to teach locating the electronic circuit device in a housing.
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`Applicant Admitted Prior Art Figure 7 teaches a semiconductor element 102
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`mounted on printed circuit board 100 by soldering terminals 102a to board 100. Metal
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`plate 105 is disposed such that it is brought into solidly contact with element 102. On
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`top of that, printed circuit board 100 is fixed to housing 108 with screws 111, and an
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`opening of housing 108 is covered with metal plate 105.
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`It would have been an obvious to one of ordinary skill
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`in the art at the time the
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`invention was made to enclose the electronic circuit device of Pearson et al.
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`in a
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`housing as taught by AAPA Figure 7,
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`in order to isolate the device from the external
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`environment and protect the circuit board from damage by enclosing it in a housing.
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`Claim 2, Pearson et al. discloses teaches the electronic circuit device of claim 1,
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`wherein the semiconductor element [56/60] is mounted on the upper face of the printed
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`circuit board 50, figure 4c].
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`

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`Application/Control Number: 13/245,914
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`Page 5
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`Art Unit: 2832
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`Claim 5, Pearson et al. discloses the electronic circuit device of claim 1, wherein
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`the insulating sheet [72] is coated with a thermo-diffusion compound [72 is a thermal
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`interface material to allow heat transfer from the semiconductor device 56/60 to the
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`plate 12; paragraph 0030].
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`Claim 6, Pearson et al. discloses the electronic circuit device of claim 1 further
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`comprising a spacer [58] disposed between the printed circuit board [50] and the
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`semiconductor element [56/60; the contact structure 50 electrically interconnects the
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`semiconductor 56/60 and the circuit board 50 while additionally spacing the
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`semiconductor 56/60 from the circuit board 50; figure 4c].
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`Allowable Subject Matter
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`Claims 3 and 4 are objected to as being dependent upon a rejected base claim,
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`but would be allowable if rewritten in independent form including all of the limitations of
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`the base claim and any intervening claims.
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`Conclusion
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to BERNARD ROJAS whose telephone number is (571)
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`272-1998. The examiner can normally be reached on M-TH 6:00-4:30.
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`lf attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Elvin G. Enad can be reached on (571) 272-1990. The fax phone number
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`for the organization where this application or proceeding is assigned is 571 -273-8300.
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`

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`Application/Control Number: 13/245,914
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`Page 6
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`Art Unit: 2832
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`
`(PAIR)
`
`system.
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`
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`Br
`
`/Bernard Rojas/
`Primary Examiner, Art Unit 2832
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`