UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMIVHSSIONER FOR PATENTS
`PO. Box 1450
`Alexandria1 Virginia 22313-1450
`www.uspto.gov
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`'I AND1%9
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`13/938,893
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`07/10/2013
`
`Takeshi ARAI
`
`20326.0040US01
`
`9622
`
`HAMRE, SCHUMANN, MUELLER & LARSON P.C.
`PO. BOX 2902
`MINNEAPOLIS, MN 55402-0902
`
`JUNGE, BRYAN R.
`
`PAPER NUIVIBER
`
`ART UNIT
`
`2897
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`01/21/2016
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`following e—mail address(es):
`PTOMail @hsml.c0m
`
`PTOL—90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 13/938,893 ARAI ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventor to File)
`Office Action Summary
`
`BRYAN JUNGE its“ 2897
`
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1 .704(b).
`
`In no event, however, may a reply be timely filed
`
`Status
`
`1)IZI Responsive to communication(s) filed on 10/28/2015.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2b)|ZI This action is non-final.
`2a)|:l This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
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`; the restriction requirement and election have been incorporated into this action.
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`4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
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`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims*
`
`5)IZI Claim(s) 1-5 7-9 11-13 and 15-18 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`6)I:I Claim(s)
`is/are allowed.
`
`7)|Z| Claim(s) 1 -5 7-9 11- 13 and 15- 18is/are rejected.
`8)|:I Claim(s)_ is/are objected to.
`
`
`are subject to restriction and/or election requirement.
`9)I:I Claim((s)
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`hit
`:/'/\W¢W.LISI>I‘.0. ovI’ atentS/init events/
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`
`
`hI/index.‘s or send an inquiry to PPI-iieedback{®usgtc.00v.
`
`Application Papers
`
`10)I:l The specification is objected to by the Examiner.
`11)I:l The drawing(s) filed on
`is/are: a)I:I accepted or b)I:I objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`
`12)I:| Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`
`a)I:l All
`
`b)|:l Some” c)I:l None of the:
`
`1.I:I Certified copies of the priority documents have been received.
`2.|:l Certified copies of the priority documents have been received in Application No.
`3.|:| Copies of the certified copies of the priority documents have been received in this National Stage
`
`application from the International Bureau (PCT Rule 17.2(a)).
`** See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`
`
`3) D Interview Summary (PTO-413)
`1) E Notice of References Cited (PTO-892)
`Paper No(s)/Mai| Date.
`.
`.
`4) I:I Other'
`2) I] InformatIon DIsclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
`PTOL—326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mai| Date 20160112
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`

`

`Application/Control Number: 13/938,893
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`Page 2
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`Art Unit: 2897
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`DETAILED ACTION
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`1.
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`The present application is being examined under the pre—AIA first to invent provisions.
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`Response to Arguments
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`2.
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`Applicant’s arguments have been considered but are moot because the arguments do not
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`apply to the current rejection.
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`Claim Rejections - 35 USC § 103
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`3.
`
`The following is a quotation of pre—AIA 35 USC. 103(a) which forms the basis for all
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`obviousness rejections set forth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described as set
`forth in section 102 of this title, if the differences between the subject matter sought to be patented and
`the prior art are such that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said subject matter pertains.
`Patentability shall not be negatived by the manner in which the invention was made.
`
`4.
`
`Claims 1, 2, 5, 7—9, 11—13, 15, 16, and 18 are rejected under pre—AIA 35 USC. 103(a) as
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`being unpatentable over Ozaki et al. (US 2001/0028418) in view of lkeda (US 7,872,261),
`
`Kamada (US 7,978,165), Tsou (US 7,829,895) and Horiuchi et al. (US 2011/0242073).
`
`Ozaki et al. (US 2001/0028418), hereafter "Ozaki," discloses a display device, with
`
`reference to Figures 66 and 67, including teaching a plurality of pixels formed in a matrix pattern
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`by partition with a plurality of gate lines 712 and a plurality of data lines 715, paragraphs 360,
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`327, and 329, the plurality of pixels being connected to the plurality of gate lines and the
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`plurality of data lines, paragraph 331, wherein at least a part of the plurality of pixels comprises a
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`transistor 716, a pixel electrode 719 connected to the transistor, a common electrode 713
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`arranged so as to be opposed to the pixel electrode, a correction transistor 731 portion
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`

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`Application/Control Number: 13/938,893
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`Page 3
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`Art Unit: 2897
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`comprising a gate electrode portion 731g that is formed of a part of the common electrode, a
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`semiconductor active portion 714c, a drain electrode portion 715 that forms a drain electrode,
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`and a source electrode portion that 731s forms a source electrode, paragraph 362.
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`Ozaki does not disclose the gate electrode portion is contiguous with the common
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`electrode, the gate electrode and the semiconductor active portion transmit visible light, or the
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`pixel electrode comprises a plurality of opening portions, the drain electrode portion and the
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`source electrode portion of the correction transistor portion overlap the plurality of opening
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`portions.
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`lkeda (US 7,872,261), hereafter “lkeda,” discloses a display device, with references to
`
`Figures 4 and 5, including teaching a transistor with a gate electrode 2 that transmits visible light
`
`and a semiconductor active portion 5 that transmits visible light, col. 13 lines 54—67. It would
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`have been obvious to one of ordinary skill in the art at the time of the invention for the gate
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`electrode to transmit visible light and for the semiconductor active portion to transmit visible
`
`light. One would have been motivated to do so in order to form a transparent thin film transistor,
`
`col. 1 lines 41—44.
`
`Kamada (US 7,978,165), hereafter “Kamada,” discloses a display device including
`
`teaching a gate electrode, 16 in Figure l, is contiguous with a common electrode 14, col. 6 lines
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`48—55. It would have been obvious to one of ordinary skill in the art at the time of the invention
`
`for the gate electrode to be contiguous with the common electrode. One would have been
`
`motivated to do so in order to form the gate to the backup transistor spaced apart from the gate of
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`the primary transistor to decrease the chance of both transistors being damaged or defective, col.
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`7 lines 33—42.
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`

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`Application/Control Number: 13/938,893
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`Page 4
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`Art Unit: 2897
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`Tsou (US 7,829,895), hereafter "Tsou," discloses a display device including teaching a
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`pixel electrode, 312 in Figure 3A, wherein the drain electrode portion 322 and the source
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`electrode portion 320 of the correction transistor overlap the pixel electrode, col. 4 lines 48—54.
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`Horiuchi et al. (US 2011/0242073), hereafter “Horiuchi," discloses a display device
`
`including teaching a pixel electrode comprising a plurality of opening portions, 15c in Figure 6,
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`and a drain electrode portion 27 and a source electrode 26 portion overlapping the plurality of
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`opening portions, paragraphs 154 and 177 and 178.
`
`It would have been obvious to one of ordinary skill in the art at the time of the invention
`
`for the pixel electrode to comprise a plurality of opening portions, and the drain electrode portion
`
`and the source electrode portion of the correction transistor portion to overlap the plurality of
`
`opening portions.
`
`One would have been motivated to do so in order to control the orientation of the liquid
`
`crystals in the display, paragraph 18 of Horiuchi, and to increase the ratio of the pixel area
`
`covered by the pixel electrode by expanding the pixel electrode over the correction transistor, as
`
`in Tsou, Figure 3A, compared to Ozaki Figure 66.
`
`In reference to claim 2, Ozaki discloses corresponding one of the plurality of pixels is
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`driven by a correction transistor that is formed by cutting off corresponding one of the plurality
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`of data lines from the pixel electrode, paragraph 364, and in the correction transistor portion,
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`cutting off the gate electrode portion from the common electrode, paragraph 362, connecting the
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`gate electrode portion to corresponding one of the plurality of gate lines, paragraph 365,
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`connecting the source electrode portion to corresponding one of the plurality of data lines, and
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`connecting the drain electrode portion to the pixel electrode, paragraph 367.
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`

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`Application/Control Number: 13/938,893
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`Page 5
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`Art Unit: 2897
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`In reference to claim 5, Ozaki discloses the correction transistor portion further comprises
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`a gate Wiring portion 732 for connecting the gate electrode portion to the corresponding one of
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`the plurality of gate lines 712, paragraph 366, and a data Wiring portion 715 for connecting the
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`source electrode portion to the corresponding one of the plurality of data lines 715, paragraph
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`362.
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`In reference to claim 7, Ozaki discloses the correction transistor portion 732 is provided
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`so as to overlap above corresponding one of the plurality of gate lines 712, Figure 67.
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`In reference to claim 8, Ikeda discloses the semiconductor active portion is made of an
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`amorphous oxide semiconductor, col. 5 line 64 to col. 6 line 13.
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`In reference to claim 9, Ozaki discloses a method of correcting a pixel defect in which a
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`plurality of pixels formed in a matrix pattern by partition with a plurality of gate lines and a
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`plurality of data lines is included, paragraphs 360, 327, and 329, and in which the plurality of
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`pixels are connected to the plurality of gate lines and the plurality of data lines, paragraph 331,
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`the display device comprising, at least a part of the plurality of pixels including
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`a transistor, 716 in Figure 66, a pixel electrode 719 connected to the transistor, paragraph
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`331, a common electrode 713 arranged so as to be opposed to the pixel electrode, paragraph 327,
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`and
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`a correction transistor portion including a gate electrode portion 731g that is formed of a
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`part of the common electrode, a semiconductor active portion 714c, a drain electrode portion 715
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`that forms a drain electrode, and a source electrode portion that forms a source electrode 731s,
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`paragraph 362,
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`

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`Application/Control Number: 13/938,893
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`Page 6
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`Art Unit: 2897
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`the pixel defect correcting method comprising cutting off corresponding one of the
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`plurality of data lines from the pixel electrode, paragraph 364, cutting off the gate electrode
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`portion from the common electrode, paragraph 362, connecting the gate electrode portion to
`
`corresponding one of the plurality of gate lines, connecting the source electrode portion to
`
`corresponding one of the plurality of data lines; and connecting the drain electrode portion to the
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`pixel electrode, paragraphs 365—367.
`
`Ozaki does not disclose the gate electrode portion is contiguous with the common
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`electrode, the gate electrode and the semiconductor active portion transmit visible light, or the
`
`pixel electrode includes a plurality of slits wherein the source electrode and the drain electrode of
`
`the correction transistor portion overlap the plurality of slits.
`
`Ikeda discloses a display device, with references to Figures 4 and 5, including teaching a
`
`transistor with a gate electrode 2 that transmits visible light and a semiconductor active portion 5
`
`that transmits visible light, col. 13 lines 54—67. It would have been obvious to one of ordinary
`
`skill in the art at the time of the invention for the gate electrode to transmit visible light and for
`
`the semiconductor active portion to transmit visible light. One would have been motivated to do
`
`so in order to form a transparent thin film transistor, col. 1 lines 41—44.
`
`Kamada discloses a display device including teaching a gate electrode, 16 in Figure l, is
`
`contiguous with a common electrode 14, col. 6 lines 48—55. It would have been obvious to one of
`
`ordinary skill in the art at the time of the invention for the gate electrode to be contiguous with
`
`the common electrode. One would have been motivated to do so in order to form the gate to the
`
`backup transistor spaced apart from the gate of the primary transistor to decrease the chance of
`
`both transistors being damaged or defective, col. 7 lines 33—42.
`
`

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`Application/Control Number: 13/938,893
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`Page 7
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`Art Unit: 2897
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`Tsou discloses a display device including teaching a pixel electrode, 312 in Figure 3A,
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`wherein the drain electrode portion 322 and the source electrode portion 320 of the correction
`
`transistor overlap the pixel electrode, col. 4 lines 48—54.
`
`Horiuchi discloses a display device including teaching a pixel electrode comprising a
`
`plurality of slits, 15c in Figure 6, and a drain electrode portion 27 and a source electrode 26
`
`portion overlapping the plurality of opening portions, paragraphs 154 and 177 and 178.
`
`It would have been obvious to one of ordinary skill in the art at the time of the invention
`
`for the pixel electrode to comprise a plurality of slits, and the drain electrode portion and the
`
`source electrode portion of the correction transistor portion to overlap the plurality of opening
`
`portions.
`
`One would have been motivated to do so in order to control the orientation of the liquid
`
`crystals in the display, paragraph 18 of Horiuchi, and to increase the ratio of the pixel area
`
`covered by the pixel electrode by expanding the pixel electrode over the correction transistor, as
`
`in Tsou, Figure 3A, compared to Ozaki Figure 66.
`
`In reference to claim 11, Ozaki discloses a display device, with reference to Figures 66
`
`and 67, comprising a plurality of pixels formed in a matrix pattern by partition with a plurality of
`
`gate lines and a plurality of data lines, paragraphs 360, 327, and 329, the plurality of pixels being
`
`connected to the plurality of gate lines and the plurality of data lines, paragraph 331,
`
`wherein a part of the plurality of pixels comprises a pixel electrode 719, a common
`
`electrode 713 arranged so as to be opposed to the pixel electrode, and a correction transistor
`
`connected to the pixel electrode, paragraph 367, and a defective transistor 716, paragraph 363,
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`wherein the correction transistor comprises a gate electrode formed in the same layer and of the
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`

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`Application/Control Number: 13/938,893
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`Page 8
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`Art Unit: 2897
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`same material as the common electrode, a semiconductor active portion 714c, a drain electrode
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`715 and a source electrode 731s, paragraphs 362.
`
`Ozaki does not disclose the common electrode or the semiconductor active portion
`
`transmit visible light, the defective transistor is disconnected from the pixel electrode, the pixel
`
`electrode includes a plurality of slits, or the drain electrode of the correction transistor overlap
`
`the plurality of slits.
`
`Ikeda discloses a display device, with references to Figures 4 and 5, including teaching a
`
`common electrode 3 that transmits visible light, col. 13 lines 54—58, and a transistor with a
`
`semiconductor active portion 5 that transmits visible light, col. 13 lines 63—67. It would have
`
`been obvious to one of ordinary skill in the art at the time of the invention for the semiconductor
`
`layer to transmit visible light. One would have been motivated to do so in order to form a
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`transparent device, col. 1 lines 41—44.
`
`Kamada discloses a display device including teaching a defective transistor, TFTl in
`
`Figure 4 is disconnected from the pixel electrode 42, col. 8 lines 48—59. It would have been
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`obvious to one of ordinary skill in the art at the time of the invention to disconnect the defective
`
`transistor from the pixel electrode. One would have been motivated to do so in order to
`
`disconnect the gate line from the pixel at the defective transistor.
`
`Tsou discloses a display device including teaching a pixel electrode, 312 in Figure 3A,
`
`wherein the drain electrode portion 322 and the source electrode portion 320 of the correction
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`transistor overlap the pixel electrode, col. 4 lines 48—54.
`
`

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`Application/Control Number: 13/938,893
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`Page 9
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`Art Unit: 2897
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`Horiuchi discloses a display device including teaching a pixel electrode comprising a
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`plurality of slits, 15c in Figure 6, and a drain electrode portion 27 and a source electrode 26
`
`portion overlapping the plurality of opening portions, paragraphs 154 and 177 and 178.
`
`It would have been obvious to one of ordinary skill in the art at the time of the invention
`
`for the pixel electrode to comprise a plurality of slits, and the drain electrode portion of the
`
`correction transistor to overlap the plurality of opening portions.
`
`One would have been motivated to do so in order to control the orientation of the liquid
`
`crystals in the display, paragraph 18 of Horiuchi, and to increase the ratio of the pixel area
`
`covered by the pixel electrode by expanding the pixel electrode over the correction transistor, as
`
`in Tsou, Figure 3A, compared to Ozaki Figure 66.
`
`In reference to claims 12, 13, and 15, Ozaki in view of Ikeda and Kamada does not
`
`disclose the semiconductor active portion overlaps with the pixel electrode.
`
`Tsou discloses a display device including teaching a correction transistor portion
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`including a semiconductor active portion 318 in Figure 4A that overlaps with the pixel electrode
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`312, col. 4 lines 28—54. It would have been obvious to one of ordinary skill in the art at the time
`
`of the invention for the semiconductor active portion to overlap with the pixel electrode. One
`
`would have been motivated to do so in order for the pixel electrode to cover as much of the pixel
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`portion as possible.
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`In reference to claim 16, Ozaki in view of Ikeda does not disclose the semiconductor
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`active portion overlaps with the pixel electrode.
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`Tsou discloses a display device including teaching a correction transistor portion
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`including a semiconductor active portion 318 in Figure 4A that overlaps with the pixel electrode
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`

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`Application/Control Number: 13/938,893
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`Page 10
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`Art Unit: 2897
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`312, col. 4 lines 28—54. It would have been obvious to one of ordinary skill in the art at the time
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`of the invention for the correction transistor to overlap with the pixel electrode. One would have
`
`been motivated to do so in order for the pixel electrode to cover as much of the pixel portion as
`
`possible.
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`In reference to claim 18, Ozaki discloses the common electrode is connected to a
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`common signal line, paragraphs 14 and 323.
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`5.
`
`Claim 3 is rejected under pre—AIA 35 U.S.C. 103(a) as being unpatentable over Ozaki et
`
`al. (US 2001/0028418) in view of Ikeda (US 7,872,261),Kamada (US 7,978,165), Tsou (US
`
`7,829,895), and Horiuchi et al. (US 2011/0242073) as applied to claim 1 above and further in
`
`view of Katayama et al. (US 5,102,361).
`
`In reference to claim 3, Ozaki discloses a gate connection pad for connecting the gate
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`electrode portion to the corresponding one of the plurality of gate lines, Figure 68.
`
`Ozaki in view of lkeda, Kamada, Tsou, and Horiuchi does not disclose a source
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`connection pad for connecting the source electrode portion to the corresponding one of the
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`plurality of data lines.
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`Katayama et al. (US 5,102,361), hereafter “Katayama," discloses a display device
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`including teaching a source connection pad, 24 in Figures 8 and 9, for connecting the source
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`electrode portion 8a to the corresponding one of the plurality of data lines 4, col. 11 lines 8—24. It
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`would have been obvious to one of ordinary skill in the art at the time of the invention to form a
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`source connection pad for connecting the source electrode portion to the corresponding one of
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`

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`Application/Control Number: 13/938,893
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`Page 11
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`Art Unit: 2897
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`the plurality of data lines. One would have been motivated to do so in order to not connect the
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`source to the data line unless the spare transistor is needed.
`
`6.
`
`Claim 4 is rejected under pre—AIA 35 U.S.C. 103(a) as being unpatentable over Ozaki et
`
`al. (US 2001/0028418) in view of Ikeda (US 7,872,261), Kamada (US 7,978,165), Tsou (US
`
`7,829,895), Horiuchi et al. (US 2011/0242073) and Katayama et al. (US 5,102,361) as applied to
`
`claim 3 above and further in view of Whetten (US 5,062,690).
`
`In reference to claim 4, Katayama discloses the source connection pad 24 is formed in the
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`same layer as the plurality of gate lines 3, col. 10 lines 30—36.
`
`Ozaki in view of lkeda, Kamada, Tsou, Horiuchi, and Katayama does not disclose the
`
`gate connection pad is formed in the same layer as the drain electrode portion and the source
`
`electrode portion.
`
`Whetten (US 5,062,690) discloses a display device including teaching forming a gate
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`connection pad 66 in Figure 7C for connecting a gate electrode 36’ to a gate line l6”b in the
`
`same layer as a drain electrode portion and a source electrode portion 60, 62, Col. 9 lines 18—34.
`
`It would have been obvious to one of ordinary skill in the art at the time of the invention for the
`
`gate connection pad to be formed in the same layer as the drain electrode portion and the source
`
`electrode portion. One would have been motivated to do so in order to combine formation of
`
`multiple conductive portions in a single step.
`
`7.
`
`Claim 17 is rejected under pre—AIA 35 U.S.C. 103(a) as being unpatentable over Ozaki et
`
`al. (US 2001/0028418) in view of Ikeda (US 7,872,261), Kamada (US 7,978,165), Tsou (US
`
`

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`Application/Control Number: 13/938,893
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`Page 12
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`Art Unit: 2897
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`7,829,895), and Horiuchi et al. (US 2011/0242073), as applied to claim 1 above and further in
`
`view of Lee et al. (US 2009/0207358).
`
`In reference to claim 17, Ozaki in view of Ikeda, Kamada, Tsou, and Horiuchi, does not
`
`disclose an area of the common electrode is equal to or larger than an area of the pixel electrode.
`
`Lee et al. (US 2009/0207358) discloses a display device including teaching an area of the
`
`common electrode, 307 in Figure 6, is equal to or larger than an area of the pixel electrode 306,
`
`paragraph 37 and claims 10 and 16. It would have been obvious to one of ordinary skill in the art
`
`at the time of the invention for an area of the common electrode to be equal to or larger than and
`
`area of the pixel electrode. One would have been motivated to do so in order to form a horizontal
`
`electric field for switching the display, paragraph 14.
`
`Conclusion
`
`8.
`
`Applicant's amendment necessitated the new ground(s) of rejection presented in this
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`Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a).
`
`Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
`
`A shortened statutory period for reply to this final action is set to expire THREE
`
`MONTHS from the mailing date of this action. In the event a first reply is filed within TWO
`
`MONTHS of the mailing date of this final action and the advisory action is not mailed until after
`
`the end of the THREE—MONTH shortened statutory period, then the shortened statutory period
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`will expire on the date the advisory action is mailed, and any extension fee pursuant to 37
`
`CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event,
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`

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`Application/Control Number: 13/938,893
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`Page 13
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`Art Unit: 2897
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`however, Will the statutory period for reply expire later than SIX MONTHS from the date of this
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`final action.
`
`Any inquiry concerning this communication or earlier communications from the
`
`examiner should be directed to BRYAN JUNGE Whose telephone number is (571)270—5717.
`
`The examiner can normally be reached on Monday—Thursday 9:00AM to 5:00PM.
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
`
`supervisor, Fernando Toledo can be reached on (571)272—1867. The fax phone number for the
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`organization Where this application or proceeding is assigned is 571—273—8300.
`
`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published applications
`
`may be obtained from either Private PAIR or Public PAIR. Status information for unpublished
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`applications is available through Private PAIR only. For more information about the PAIR
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`system, see http://pair—direct.uspto.gov. Should you have questions on access to the Private PAIR
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`system, contact the Electronic Business Center (EBC) at 866—217—9197 (toll—free). If you would
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`like assistance from a USPTO Customer Service Representative or access to the automated
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`information system, call 800—786—9199 (IN USA OR CANADA) or 571—272—1000.
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`/BRYAN JUNGE/
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`Primary Examiner, Art Unit 2897
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