`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www .uspto.gov
`
`APPLICATION NO.
`
`
`
`
` FILING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKETNO.
`
`CONFIRMATIONNO.
`
`14/074,870
`
`11/08/2013
`
`Toshihiro SATO
`
`0520-41436CC2
`
`4668
`
`TYPHA IPLLC
`
`1819 L Street NW Suite 200
`Washington, DC 20036
`
`Le
`
`LLLIN
`
`PAPER NUMBER
`
`DELIVERY MODE
`
`PAPER
`
`ART UNIT
`
`2693
`
`MAIL DATE
`
`12/01/2016
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 14/074,870 SATO ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventorto File)
`Office Action Summary
`
`LIN LI Na 2693
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a).
`after SIX (6) MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Anyreply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1.704(b).
`
`In no event, however, may a reply betimely filed
`
`Status
`1)X] Responsive to communication(s) filed on 10/14/2016.
`LJ A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiledon__
`2a)X] This action is FINAL.
`2b)L] This action is non-final.
`3)L] Anelection was made bythe applicant in responsetoarestriction requirementset forth during the interview on
`
`
`; the restriction requirement and election have been incorporatedinto this action.
`4)[] Since this application is in condition for allowance exceptfor formal matters, prosecution as to the merits is
`closed in accordance with the practice under Ex parte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
` Attachment(s)
`
`Disposition of Claims*
`5) Claim(s) 1-74 is/are pending in the application.
`
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`6)L] Claim(s)
`is/are allowed.
`7)X] Claim(s) 1-14 is/are rejected.
`8)L] Claim(s)____is/are objectedto.
`
`9)L] Claim(s)
`are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`or send an inquiry to PPHieedback@uspto.qoy.
`
`Application Papers
`10)L] The specification is objected to by the Examiner.
`11)K] The drawing(s)filed on 11/8/2013 is/are: a)[_] accepted or b)X] objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)[] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`a)L] All
`b)[-] Some** c)L] None ofthe:
`1..] Certified copies of the priority documents have been received.
`2.L] Certified copies of the priority documents have been received in Application No.
`3.L] Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`““ See the attached detailed Office action for a list of the certified copies not received.
`
`3) CT] Interview Summary (PTO-413)
`1) X Notice of References Cited (PTO-892)
`Paper No(s)/Mail Date.
`:
`.
`4 Ol Other:
`2) CT] Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20161101
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 2
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`DETAILED ACTION
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`Notice of Pre-AlA or AIA Status
`
`1.
`
`The present application is being examined underthe pre-AlA first to invent
`
`provisions.
`
`Drawings
`
`2.
`
`The drawings are objected to under 37 CFR 1.83(a). The drawings must show
`
`every feature of the invention specified in the claims. Therefore, the “the second
`
`scanning line is adjacent to the first scanning line” must be shownor the feature(s)
`
`canceled from the claim(s). No new matter should be entered.
`
`Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in
`
`reply to the Office action to avoid abandonmentof the application. Any amended
`
`replacement drawing sheet should includeall of the figures appearing on the immediate
`
`prior version of the sheet, evenif only one figure is being amended. The figure orfigure
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`number of an amended drawing should not be labeled as “amended.”If a drawing figure
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`is to be canceled, the appropriate figure must be removedfrom the replacement sheet,
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`and where necessary, the remaining figures must be renumbered and appropriate
`
`changes madeto the brief description of the several views of the drawings for
`
`consistency. Additional replacement sheets may be necessary to show the renumbering
`
`of the remaining figures. Each drawing sheet submitted after the filing date of an
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`application must be labeled in the top margin as either “Replacement Sheet” or “New
`
`Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner,
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 3
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`the applicant will be notified and informed of any required corrective action in the next
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`Office action. The objection to the drawings will not be held in abeyance.
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`3.
`
`Claim 8 is objected to because of the following informalities:
`
`Claim Objections
`
`Asto claim 8: it recites “the lower electrode and the cannel layer exists”in lines
`
`8-9. The cannel layer appears hasa typo error.
`
`Appropriate correction is required.
`
`Claim Rejections - 35 USC § 112
`
`4.
`
`The following is a quotation ofthe first paragraph of pre-AlIA 35 U.S.C. 112:
`
`The specification shall contain a written description of the invention, and of the
`manner and process of making and usingit, in suchfull, clear, concise, and exact termsas to
`enable any person skilled in the art to whichit pertains, or with which it is most nearly
`connected, to make and use the same, and shall set forth the best mode contemplated by the
`inventor of carrying out his invention.
`
`5.
`
`Claims 6-7, 10, 14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-
`
`AIA), first paragraph, asfailing to comply with the written description requirement. The
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`claim(s) contains subject matter which wasnotdescribed in the specification in such a
`
`way as to reasonably convey to one skilled in the relevant art that the inventor or a joint
`
`inventor, or for pre-AlA the inventor(s), at the time the application wasfiled, had
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`possession of the claimed invention.
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 4
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`Asto claim 6: The newly addedlimitation “the second scanning line is adjacent
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`ta the first scanning line” is not described in the original disclosure. Therefore, the newly
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`addedlimitation is considered as new matter.
`
`Asto claim 7: The newly addedlimitation “the second active device is selected
`
`by ihe second scanning line before the first active device is selected by the first
`
`scanning line’ is not describedin the original disclosure. Therefore, the newly added
`
`limitation is considered as new matter.
`
`&S to claim 14: The newly addedlimitation “the second pixel is selected by the
`
`second scanning line before the first pixel is selectect by the first scanning line” is not
`
`describedin the original disclosure. Therefore, the newly addedlimitation is considered
`
`as new matter.
`
`As to claim 14: The newly addedlimitation “the secand pixel is selected by the
`
`second scanning line before ihe first pixel is selected by the first scanning line” is not
`
`describedin the original disclosure. Therefore, the newly addedlimitation is considered
`
`as new matter.
`
`6.
`
`The following is a quotation of 35 U.S.C. 112 (pre-AlA), second paragraph:
`The specification shall conclude with one or more claims particularly pointing out and distinctly
`claiming the subject matter which the applicant regards as his invention.
`
`7.
`
`Claim 8-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AlA),
`
`second paragraph, as being indefinite for failing to particularly point out and distinctly
`
`claim the subject matter which the inventor or a joint inventor, or for pre-AlA the
`
`applicant regards as the invention.
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 5
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`Claim 8 recites the limitation " the charine! iayer "in line 7. There is insufficient
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`antecedentbasis for this limitation in the claim. Therefore, claim 8 is indefinite.
`
`Claims 9-10 are dependentclaim of claim 8. Therefore, claims 9-10 are also
`
`indefinite.
`
`Claim Rejections - 35 USC § 103
`
`8.
`
`The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis
`
`for all obviousnessrejections set forth in this Office action:
`
`(a) A patent may not be obtained though the invention is not identically disclosed or described
`as set forth in section 102, if the differences between the subject matter sought to be patented
`andthe prior art are such that the subject matter as a whole would have been obvious at the
`time the invention was made to a person having ordinary skill in the art to which said subject
`matter pertains. Patentability shall not be negatived by the manner in which the invention was
`made.
`
`9.
`
`Claims 1-2, 5, 8-14 are rejected under pre-AlA 35 U.S.C. 103(a) as being
`
`unpatentable over Kimura (US 7012290 B2), in view of Arao et al (US 2001/0009283
`
`A1).
`
`4s to claim 1: Kimura ciscloses an organic EL display module (Figs. 2-5, “an
`
`organic EL display module”) comprising a pixel disposed in respective intersections
`
`between a plurality of scanning lines and a plurality of data lines (Fig. 54 shows “a pixel’
`
`disposed? iri respective intersections between “a plurality of scanning lines” and “a
`
`plurality of data ines”), and a current supply line that suppiies sieciric current to the
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`pixel (Fig. 26, “a current supply dines 207" that supplies electric current to the pixel}, the
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`glurality of scanning lines and the giuralily of data ines being aligned in a matrix (Fig.
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`SA shows the plurality of scanning lines and the plurality of dala lines being aligned In 4
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`riatix),
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
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`Page 6
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`wherein the pixel includes an active device thal is selected by a first scarining
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`line of the scanning lines (Fig. 2, “an active device 201”that is selected by “a first
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`scanning line 206 of the scanning lines), a dala storage device that stores a data signal
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`thal is supplied from one of the data lines (Fig. 2B, “a data storage device 204" from “a
`
`data line 205" of the data lines), and an organic light emilling device thal ernits light by
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`the electric current supplied by the current supply line according to the data signal
`
`stored in the data storage device (Fig. 2B, "an organic light ernitting device 203° that
`
`emis ight by the electric current supplied by the current supply line 207; cal. 19, lines
`
`20-29; col. 25, lines 9-36, “an organic material used for the Hanht-emitling lever’),
`
`wherein the data storage device provides a lower electrode, an insulating layer,
`
`and an upper clectrode (Fig. 24-25 show the dala storage device provides a lower
`
`electrode, an insulating layer, and an upper electrode, wherein the lower electrocie is
`
`connected to the current supply line, the upper electradie is connected fo “a gale
`
`electrode of a transistor 202" and the active device 201, anc the insulating layeris
`
`between the lower electrode and the upper electrode in order to form the storage
`
`CANaCITGN,
`
`wherein the lower electrode anc a channel layer of the active device are located
`
`al a same layer (Fig. 24 shows the lower electrode of the capacitor 204 is connected to
`
`the current line and a channel layer of the active device 201 are located at a same
`
`layer},
`
`wherein the lower slectrode is divided from the channel layer al the same layer
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`(Fig. 2A shows the lower electrode of the slorage 204 is connected to the current line al
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
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`Page 7
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`"a drain/source electrode of a driving transistor 202", wherein the lower eleciroce is
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`divided from the channel layer al the same layer,
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`wherein the insulating layer is formed on the lower electrode, the upper electrode
`
`is formed on the insulating layer, and the upner electrode is connected to the channel!
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`layer (Figs. 2A-28 showthe dala storage capacitar 204 includes the lower electrode is
`
`conmecied to the current supply line, the upper electrode is connected to the channel
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`layer of the active device 201, and the insulating layer is disposed between the lower
`
`electrode and ihe upper electrode in order to form the data storage capacitor}.
`
`Kimura disclose the claimed invention excent for representing an insulating layer
`
`is formed on between the lower electrade and the upper siectrode of the data storage
`
`device. However, Arao teaches a data storage capacitor is formed a lower electrode, an
`
`insulating layer, and an upper electrode (Fig. 7A-7C, "a data storage capacitor 205"is
`
`farmed a lower electrode, an upper electrode, and an insulating layeris dispased
`
`between the iower electrode and the upper electrode: 70095, “the storage capacitor 205
`
`is farmed by an upper electrode (capacitor wiring) 139, a dielectric (an insulating fim
`
`formed of the same material as the gate insulating film), anc a lower slectrode (a
`
`semiconductor layer which is corinected to ihe drain region 226 of the pixel TFT 204").
`
`At the time of the invention was made,it would have been obvious to oneof ordinary
`
`skill in the art to have an insulating layer is formed between the lowerelectrode and the
`
`upperelectrode of the data storage capacitor, wherein the data storage device provides
`
`a iower electrode, an insulating layer, and an upmer electrode, wherein the insulating
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`layer is formeci on the lower electrode, the upper electrode is formed on the insulating
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 8
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`layer as taught by Arao. The motivation would have been in order ta farm an active
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`maiix cisplay device includes a dala siorage capacitor, wherein the storage capaciior
`
`having 4 second region of the semiconductorlayer, an insulating film in contact with the
`
`second region, and a capacitor wiring on the insulating film (Arao: €0015-0016).
`
`As to claim @: Kimura discloses an organic EL display module (Figs. 2-5, “an
`
`organic EL disolay module") comprising:
`
`a plurality of scanning lines including a first scanning line and a second scanning
`
`line (Figs. 2-3, a plurality of scanning lines including “a first scanning line 106/206" and
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`“a second scanning ling Ti1)
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`a first pixel selected by the first scanning Hine and inciuding a thin fim transistor
`
`and a capacitor, a gate electrode of the thin film transistor connected fo the first
`
`scanning line, the capacitor having a lower electrode, an insulating laver, and an upper
`
`electrode (Figs. 2-3 show "a first pixel A” selected by the first scanning line 106/206 and
`
`including “a thin fim transistor 107/201" and “a capacitor 104/204", a gate siectroce of
`
`the thin film transistor connected to the first scanning line, the capaciter having a lower
`
`electrode, an insulating layer, and an upper electrode, wherein the lower slectrade
`
`connected fo a current line 207, the upper electrode connected to a source/drain
`
`electrode of the thin film transistor 204, and the insulating layeris disposed between the
`
`lower electrode and the upper electrode in order to form the capacitor}: and
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`a second pixel selected by the second scanning line and being adiacent to the
`
`first pixel (Fig. 3 shows @ second pixel selecied by the second scanning line 111 and
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`being adiacent to the first pixel A},
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 9
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`ine lower electrode is divided from the channel layer al a same layer, and rio
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`conductive material directly connecting both of the lower electrode and the channel
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`layer exists (Fig. 24 shows the lower electrode of the capacitor is divided fram the
`
`channel layer of the thin film transistor at the same layer, anc no conductive material
`
`directly canriecting both the lower slectrade and the channel layer exisis).
`
`Kimura cisclose the claimed invention except for representing the capacitor
`
`includes an insulating layer. However, Arac teaches a capacitor is formed by a lower
`
`electrode, an insulating layer, and an upper electrode (Fig. 7A, “a capacitor 205” is
`
`formed a lower electrode, an upper electrode, and an insulating layer is disposed
`
`between ine lower slectracde and the upper electrode; FO095, “the stcrage capacitor 205
`
`is formed by an upper electrode (capacitor wiring) 139, a dislectric (an insulating film
`
`formed of the same material as the gate insulating film), anc a lower electrode (a
`
`semiconductor layer which is connected to the drain region 226 of the pixel TFT 204”).
`
`At the time of the invention was made,it would have been obvious to oneof ordinary
`
`skill in the art to have an insulating layer is formed between the lower electrode and the
`
`upperelectrode of the data storage capacitor as taught by Arac. The motivation would
`
`nave been in order to form an active matrix display device includes a dala storage
`
`capacitor, wherein the storage capacitor having a second region of the semiconductor
`
`layer, an insulating film in contact with the second region, and a capacitor wiring on the
`
`insulating film (Arao: 90015-0016).
`
`As to claim 11: Kimura discloses an organic EL display module (Figs. 2-5, “an
`
`organic EL disolay module") comprising:
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 10
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`a dlurality of scanning lines inclucling a first scanning line and @ second scanning
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`line (Fig. 3 shows 4 plurality of scanning lines inciucing “a first scanning lines 106/206"
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`and “a second scanning line 71717);
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`@ first pixel selected by the first scanning Hine and inclucing a thin film transistar
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`and @ capacitor, a gale siectrode of the thin film transistor commected the first scanning
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`ling, ihe capacitor having a lower Giecirode, an insulating layer, and an upper electrode
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`(Figs. 2-3 snow "a first pel A” selected by the first scanning line 106/206 and including
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`“a thin fim fransister 107/207" and “a canacitor 104/204", a gate electrode of the thin
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`fim transistor connected the first scanning line, the capacilor naving a lower electrode,
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`an insulating layer, and an upper slectrode, wherein the lower sliectroce connected to a
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`current line 207, the upper slectrode connected to a source/drain electrode of the thin
`
`film transistor 201, and the insulating layer is disposed between the lower slectrode anc
`
`the upper electrode in order to form the capacitar};
`
`and
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`a second pixel selected by the second scanning line and being adiacent to the
`
`first pixel (Fig. 3 shows a second pixel selected by the second scanning line 117 and
`
`being adiacent to the first pixel A},
`
`wherein the lower electrode and a channel layer of the thin film transistor are
`
`located at a same layer (Fig. 2A shows the lower electrade of the capacitor and the
`
`charinel layer of the thin film transistor are located al a sarne layer},
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 11
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`ine lower electrode is divided from the channel layer al the same layer (Fig. 2A
`
`shows the lower electrade of the capacitoris divided frorn the channel layer of the thin
`
`film transistor at the samme iaver}, and
`
`a vollage of the lower electrode is different from a voltage of a source electrade
`
`of the thin film iransistor (Fig. 3 shows a vollage of the lower electrode is supplied by
`
`the scanning Hines which is different from a voltage of a source electrade of the thin fim
`
`transistor which is supplied by “a date line 105°).
`
`Kimura disclose the claimed invention except for representing the capacitor
`
`includes an insulating layer. Hawever, Arao teaches a capacitor is formed by a lower
`
`electrode, an insulating layer, anc an upper electrode (rig. 7A, “a capacitor 205” is
`
`formed a lower electrode, an upper electrode, and an insulating layer is disposed
`
`behveen the lower electrode and the upper electrode: FOO9S5, “the storage capacitor 205
`
`is formed by an upper eleciracie (capacitor wiring) 139, a dielectric (an insulaing film
`
`formed of the sarne material as the gale insulating fim), anc a lower electrode (a
`
`semiconductor layer which is connected to the drain region 226 of the pixel TFT 204").
`
`At the time of the invention was made,it would have been obvious to oneof ordinary
`
`skill in the art to have an insulating layer is formed between the lower electrode and the
`
`upperelectrode of the data storage capacitor as taught by Arac. The motivation wauid
`
`have been in order to form an active matrix display device includes a data storage
`
`capaciior, wherein the sforage capacitor having a second region of the semiconductor
`
`layer, an insulating film in contact wiih the secand region, and a capacitor wiring on the
`
`insulating film (Arao: 70015-0016).
`
`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 12
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`As to claim 2: Claim 2 is a denercent claim of claim 1. The prior art Arao further
`
`discloses wherein ihe upper slecirode has a same layer with the scanning line (Fig. 7A-
`
`7B shows the upper electrode 139 has a same layer with “a scanning line 1387; Foo029,
`
`“FHSS, 7A ta 7C are tom views showing a process of manufacturing a pixel TFT, a
`
`storage capaciior, and TFTs in @ driver cireuil”}. in addition, the same motivation is used
`
`as the rejection of claim e.
`
`As to claim 5: Kimura discloses wherein the lower electrode is separated from
`
`the channel layer by a space (Fig. 2A shows the lower electrode of the siorage device
`
`204 is separated from ihe channel layer by a space).
`
`As to claim 9: Kimura discloses wherein the lower electrode is connected with
`
`the second scanning line (Fig. S shows the lower electrode of the capacitor 104 is
`
`connected with the second scanning line 114}.
`
`As to claims 16, 14: Kimura and Arac do mot expressly disciose wherein the
`
`second pixel is selecteci by the second scanning line before the first pixel is selected by
`
`the first scanning line. However, ii would have been an obvious matter of design choice
`
`thal the second active device is selected by the second scanning line before the first
`
`active device is selected by the first scanning line, since application has not disclosed
`
`that “the second active device is selected by the second scanning line before the first
`
`active device is selected by the first scanning line” solves any steted problemoris for
`
`any particular puroose and i aopears that ihe invention would perform equally well with
`
`the second active device is selected by the second scanning line after the first active
`
`device is selected by the first scanning line.
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 13
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`4s to claim 12: Kimura discloses wherein the source electrode is connected io
`
`the capacitor (Figs. 2-5, the source siectrocie af the thin film transistor 101/207 is
`
`connected fo the upper electrode of the capacitor 107/201).
`
`As to claim 13: Kimura discloses wherein the lower electrode is connected with
`
`the second scanning line (Fig. 3, the lower electrode of the capaciior is commected with
`
`the second scanning line 777}.
`
`10.
`
`Claim 4 is rejected under pre-AlA 35 U.S.C. 103(a) as being unpatentable over
`
`Kimura (US 7012290 B2), in view of Arao et al (US 2001/0009283 A1) as applied to
`
`claim 1 above, and further in view of Kuroda (US 4797371).
`
`As to claim 4: Kimura discloses comprising:
`
`a driving transistor that controls a currant supplied fram the current supply line to the
`
`organic light emilting device (Fig. 2B, “a driving iransistar 202” that controls a current
`
`supnied from the current supply tine 207 to the organic light emilting device 203),
`
`wherein a channel portion of the driving transistor is formed using the upper
`
`electrode (Fig. 24 shows “a channel portion of the driving transistor 202 is formed using
`
`the upper electrode}.
`
`Kimura and Arao de not expressly disclose using the upper electrode as a mask for
`
`ion implantation. However, Kuroda teaches an upper electrode as a mask for ion
`
`imriplantation (col, 10, lines 28-35, “ion implantation uses upper electrode 83 for a
`
`mask}, At the time of the invention was made, it would have been obvious to one of
`
`ordinary skill in the art would have been motivated to modify Kimura and Arao to use the
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`

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`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 14
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`upper electrode as a maskfor ion implantation as taught by Kuroda. The motivation
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`would have beenin order to have the process of ion implantation be greatly simplified
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`(Kuroda: col. 10).
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`11.
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`Claims 6-7 are rejected underpre-AlA 35 U.S.C. 103(a) as being unpatentable
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`over Kimura (US 7012290 B2), in view of Arao et al (US 2001/0009283 A1) as applied
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`to claim 1 above, andfurtherin view of Akiyama et al (US 5986724).
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`&s to claim & Kimura in another embodiment discloses wherein the lower
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`electrode is connected wilh a second scanning line of the scanning lines (Fig. 3 shows
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`the lower electrode is connected with "a second scanning line of the scanning lines).
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`Kimura and Arao doe not expressly disclose the second scanning line is adiacent
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`fo the first scanning line. However, Akiyama teaches a first scanning line of the plurality
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`scanning ine, and a second scanning line of the plurality of scanning line is acacent ta
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`the first scanning line (Fig. 31 shows “a first scanning line 1404”of the plurality of
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`scanning lines and “a second scanning line 1408" is adjacent to the first scanning Hine:
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`col. 28, lines 2-25, “FHG. 21 has a scan line 1404 for selecting a@ transistor 1401,..., and
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`the electrode 1407 is connected to iis neighboring scan line 1408}. At the time of the
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`invention was made, it would have been obvious to one ofordinary skill in the art would
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`have been motivated to modify Kimura and Arao to implement a second scanning line,
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`wherein the second scanningline is adjacentto the first scanning line as taught by
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`Akiyama. The motivation would have beenin order to reduce the power consumption of
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`a liquid crystal display (Akiyama: col. 31).
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 15
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`&s to claim 7: Kimura discloses further cornprising @ second pixel adjacent ta
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`the pixel (Fig. 3 shows a second pixel aciacent ta the pixe),
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`wherein the second pixel has 4 second active device selected by the second
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`scanning line (Fig. 3 shows the second pixel has a second active device selected by the
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`second scanning line}.
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`Kimura does not expressly disclose the second active device is selected by the
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`second scanning line before the first active device is selected by the first scanning line.
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`However, H would have been an obvious matter of design choice that the second active
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`device is selected by the second scanning line before the first active device is selected
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`by the first scanning line, since application has nat disclosed that “the second active
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`device is selected by the second scanning line before the first active device is selectec
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`by the first scarining line” solves any stated problern or is for any particular purpose and
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`il appears that the inveniion would perform equally well with the second active device is
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`selected by the second scanning line after the first aclive device is selected by the first
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`scanning fine.
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`Response to Arguments
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`12.
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`Applicant's arguments on October 14, 2016 have been considered but are moot
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`in view of the new ground(s) of rejection.
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 16
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`Conclusion
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`13.
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`Applicant's amendment necessitated the new ground(s) of rejection presentedin
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`this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP
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`§ 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37
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`CFR 1.136(a).
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`A shortened statutory period for reply to this final action is set to expire THREE
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`
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`MONTHS from the mailing date of this action. In the eventafirst replyis filed within
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`TWO MONTHS ofthe mailing date of this final action and the advisory action is not
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`mailed until after the end of the THREE-MONTHshortenedstatutory period, then the
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`shortenedstatutory period will expire on the date the advisory action is mailed, and any
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`extension fee pursuantto 37 CFR 1.136(a) will be calculated from the mailing date of
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`the advisory action.
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`In no event, however,will the statutory period for reply expire later
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`than SIX MONTHS from the date of this final action.
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`14.=Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to LIN LI whose telephone number is (571)270-1584. The
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`examiner can normally be reached on Monday- Friday: 8:00am - 5:00pm.
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Benjamin C. Lee can be reached on 5712722963. The fax phone number
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`for the organization wherethis application or proceeding is assigned is 571-273-8300.
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`

`

`Application/Control Number: 14/074,870
`Art Unit: 2693
`
`Page 17
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`Information regarding the status of an application may be obtained from the
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`Patent Application Information Retrieval (PAIR) system. Status information for
`
`published applications may be obtained from either Private PAIR or Public PAIR.
`
`Status information for unpublished applications is available through Private PAIR only.
`
`For more information about the PAIR system, see http://pair-direct.uspto.gov. Should
`
`you have questions on accessto the Private PAIR system, contact the Electronic
`
`Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a
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`USPTO Customer Service Representative or access to the automatedinformation
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`system, call 800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/LIN LI/
`Primary Examiner, Art Unit 2693
`
`