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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMIVHSSIONER FOR PATENTS
`PO. Box 1450
`Alexandria1 Virginia 22313-1450
`www.uspto.gov
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`
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`
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`14/764,745
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`07/30/2015
`
`Shigeki NAKAMURA
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`WASH1—548 16
`
`8201
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`03’09’2018 —PEARNE&GORDON LLP m
`7590
`52054
`1801 EAST 9TH STREET
`WILBERT’ DAVID S
`S UITE 1 200
`CLEVELAND, OH 441 14-3 108
`
`PAPER NUMBER
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`ART UNIT
`2899
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`NOTIFICATION DATE
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`DELIVERY MODE
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`03/09/2018
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`ELECTRONIC
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`Please find below and/or attached an Office communication concerning this application or proceeding.
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`The time period for reply, if any, is set in the attached communication.
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`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`following e—mail address(es):
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`patdocket @ pearne.c0m
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`PTOL—90A (Rev. 04/07)
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`

`

`
`
`Applicant(s)
`Application No.
` 14/764,745 NAKAMURA ET AL.
`
`
`AIA (First Inventor to File)
`Art Unit
`Examiner
`Office Action Summary
`
`
`David s. Wilbert its“ 2899
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1 .704(b).
`
`In no event, however, may a reply be timely filed
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`Status
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`1)IZI Responsive to communication(s) filed on 12/19/2017.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
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`2b)|ZI This action is non-final.
`2a)|:l This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
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`; the restriction requirement and election have been incorporated into this action.
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`4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
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`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
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`Disposition of Claims*
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`5)IZI Claim(s) 1-3,5 and 6 is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
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`is/are allowed.
`6)I:I Claim(s)
`7)|Z| Claim(s) 1--3,5 and6is/are rejected.
`8)|:I Claim(s)_ is/are objected to.
`
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`are subject to restriction and/or election requirement.
`9)I:I Claim((s)
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
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`participating intellectual property office for the corresponding application. For more information, please see
`hit
`:/'I’wvvw.usnto. ovI’ atentS/init events/
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`
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`iv’index.‘s or send an inquiry to PPI-iieedback{®usgtc.00v.
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`Application Papers
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`10)I:l The specification is objected to by the Examiner.
`11)|Xl The drawing(s) filed on 07/30/2015 is/are: a)IXI accepted or b)|:l objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
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`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
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`Priority under 35 U.S.C. § 119
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`12)IXI Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
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`a)IZl All
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`b)|:l Some” c)I:l None of the:
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`1.IXI Certified copies of the priority documents have been received.
`2.|:l Certified copies of the priority documents have been received in Application No.
`3.|:| Copies of the certified copies of the priority documents have been received in this National Stage
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`application from the International Bureau (PCT Rule 17.2(a)).
`** See the attached detailed Office action for a list of the certified copies not received.
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`Attachment(s)
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`
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`3) D Interview Summary (PTO-413)
`1) E Notice of References Cited (PTO-892)
`Paper No(s)/Mai| Date.
`.
`.
`4) I:I Other'
`2) I] InformatIon DIsclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mai| Date
`US. Patent and Trademark Office
`PTOL—326 (Rev. 11-13)
`
`Office Action Summary
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`Part of Paper No./Mai| Date 20180302
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`

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`Application/Control Number: 14/764,745
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`Page 2
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`Art Unit: 2899
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`DETAILED ACTION
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`Notice of Pre-AIA or AIA Status
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`The present application is being examined under the pre—AIA first to invent provisions.
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`Continued Examination Under 37 CFR 1.114
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`A request for continued examination under 37 CFR 1.114, including the fee set forth in
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`37 CFR 1.17(e), was filed in this application after final rejection. Since this application is
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`eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR l.l7(e)
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`has been timely paid, the finality of the previous Office action has been withdrawn pursuant to
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`37 CFR 1.114. Applicant's submission filed on 12/19/2017 has been entered.
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`Response to Amendment
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`Claims 1—3, 5, and 6 are pending.
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`Claim Rejections - 35 USC § 103
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`The following is a quotation of 35 USC. 103 which forms the basis for all obviousness
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`rejections set forth in this Office action:
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`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not
`identically disclosed as set forth in section 102 of this title, if the differences between the claimed
`invention and the prior art are such that the claimed invention as a whole would have been obvious
`before the effective filing date of the claimed invention to a person having ordinary skill in the art to
`which the claimed invention pertains. Patentability shall not be negated by the manner in which the
`invention was made.
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`

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`Application/Control Number: 14/764,745
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`Page 3
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`Art Unit: 2899
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`Claims 1-3 and 6 are rejected under pre-AIA 35 U.S.C. 1031a) as being unpatentable
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`over Koizumi (US 2003/0164887) in view of Umezaki (US 2008/0079001).
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`Regarding claim 1, Koizumi discloses a semiconductor apparatus (see Figs. 5 and 7)
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`comprising:
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`a semiconductor substrate (101, Fig. 5);
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`a plurality of semiconductor devices (104, 108, 109, and 111) including a first
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`semiconductor device (104, 108, or 109) and a second semiconductor device (111), the
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`plurality of semiconductor devices being provided on (see Fig. 5) a first surface (top
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`surface of 101) of the semiconductor substrate, and configured to output a signal (109
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`and 111 are transistors which necessarily have an output and are therefore configured to
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`output a signal; see paragraph [0050]);
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`a plurality of signal lines (105 and 212) including a first signal line (212) and a second
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`line (105), each of the plurality of signal lines being provided on (see Figs. 5 and 7) the
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`semiconductor substrate, connected with (see Figs. 5 and 7) a corresponding
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`semiconductor devices, and configured to propagate the signal outputted from (see
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`paragraph [0050]) the corresponding semiconductor device; wherein:
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`a trench—type insulation region (portions of 213 surrounding108, 109, and 111 as seen in
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`Fig. 5 and 12 are insulation regions and appear to be trench—type) is provided in (see Figs.
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`5 and 12) the semiconductor substrate, the trench—type insulation region surrounding (see
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`Figs. 5 and 12) the first semiconductor device with at least a single surrounding structure
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`(single surrounding portion of 213 as seen in Figs. 5 and 12), the first semiconductor
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`device being connected with (see Fig. 7) the first signal line (212),
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`Application/Control Number: 14/764,745
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`Page 4
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`Art Unit: 2899
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`a first region (portion of 101 to right of, and including, portion of 10loverlapped by right
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`half of 105) where the first signal line is provided on the semiconductor substrate is
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`covered by (see Fig. 5) a polysilicon layer (211; and see paragraph [0122] which recites
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`211 is made of polysilicon),
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`a second region (portion of 101 to left of, and including, portion of 10loverlapped by left
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`half of 105) where the first signal line (212) is provided on (see Figs. 5 and 7) the
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`semiconductor substrate is covered by (see Fig. 5) the second semiconductor device
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`(1 1 1), and
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`the polysilicon layer is provided along (see Fig. 7) the first signal line (212) and is not
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`provided along (see Fig. 7 which shows 211 is not provided along 105) the second signal
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`line (105).
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`Koizumi fails to explicitly disclose the first signal line is diverged to extend in multiple
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`directions, each of the multiple directions in which the first signal line extends being different
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`from a direction in which the second signal line extends.
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`Umezaki teaches a semiconductor apparatus (see Fig. 29).
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`Umezaki additionally teaches the first signal line (506, Fig. 29) is diverged (see Fig. 29)
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`to extend in multiple directions (directions corresponding to left to right and down to up as seen
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`in Fig. 29), each of the multiple directions in which the first signal line extends being different
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`from (see Fig. 29) a direction (direction corresponding to up to down as seen in Fig. 29) in which
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`the second signal line (501) extends.
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`It would have been obvious to one of ordinary skill in the art before the effective filing
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`date of the claimed invention to further modify the device of Koizumi such that the first signal
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`Application/Control Number: 14/764,745
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`Page 5
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`Art Unit: 2899
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`line is diverged to extend in multiple directions, each of the multiple directions in which the first
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`signal line extends being different from a direction in which the second signal line extends as
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`taught by Umezaki.
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`One of ordinary skill in the art would have been motivated to incorporate the teaching of
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`Umezaki in order to improve the device fabrication procedure by selectively placing the signal
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`lines to more efficiently be connected to signal supply sources.
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`The device of Koizumi as modified by Umezaki teaches the claimed invention except for
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`“the polysilicon layer being provided between the semiconductor substrate and the first signal
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`line”. However, Koizumi teaches the polysilicon layer should separate/shield the first signal line
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`and the second signal line from each other. As such, it appears that the placement of the first
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`signal line (212) below the polysilicon layer (211) with the second signal line (105) being above
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`the polysilicon layer in the device of Koizumi was a matter of design choice. It would have been
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`obvious to one of ordinary skill in the art before the effective filing date of the claimed invention
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`to reverse the order of the first signal line, the polysilicon layer, and the second signal line as a
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`matter of design choice which would result in “the polysilicon layer being provided between the
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`semiconductor substrate and the first signal line”, since it has been held that rearranging parts of
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`an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
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`Regarding claim 2, the device of Koizumi as modified by Umezaki teaches the
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`semiconductor apparatus according to claim 1.
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`Koizumi additionally teaches wherein the polysilicon layer (211, Fig. 5) has a width that
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`is greater than (see Fig. 7) at least a width of the signal line (212).
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`Application/Control Number: 14/764,745
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`Page 6
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`Art Unit: 2899
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`Regarding claim 3, the device of Koizumi as modified by Umezaki teaches the
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`semiconductor apparatus according to claim 1.
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`Koizumi additionally teaches wherein the polysilicon layer (211, Figs. 5 and 7) is
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`provided in a region other than (see Figs. 5 and 7) a region where the plurality of semiconductor
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`devices (104, 108, 109, and 111) are provided.
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`Regarding claim 6, the device of Koizumi as modified by Umezaki teaches the
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`semiconductor apparatus according to claim 1.
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`Koizumi additionally teaches wherein the semiconductor substrate (101, Fig. 5) is
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`composed of a material of a single resistivity (see paragraph [0053] which recites 101 is n—type),
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`or a plurality of layers having different resistivities (by an alternative interpretation of Koizumi
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`when 102 is included as being part of the substrate 101; see paragraph [0053] which recites 102
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`is a p—type region).
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`Claim 5 rejected under pre-AIA 35 U.S.C. 1031a] as being unpatentable over Koizumi
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`in view of Umezak, and in further view of Anderson (US 2008/0278542).
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`Regarding claim 5, the device of Koizumi as modified by Umezaki teaches the
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`semiconductor apparatus according to claim 1.
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`Koizumi fails to explicitly disclose wherein a guard ring is provided in the semiconductor
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`substrate such that the guard ring surrounds at least one of the plurality of semiconductor devices
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`with at least a single surrounding structure.
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`Anderson teaches a semiconductor apparatus (see Figs. 6A—J).
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`Anderson additionally teaches wherein a guard ring (see paragraph [0053]) is provided in
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`the semiconductor substrate (10) such that the guard ring surrounds (see paragraph [0053]) at
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`Application/Control Number: 14/764,745
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`Page 7
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`Art Unit: 2899
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`least one of the plurality of semiconductor devices (either 18 or 46) with at least a single
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`surrounding structure (see paragraph [0053]).
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`It would have been obvious to one of ordinary skill in the art before the effective filing
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`date of the claimed invention to further modify the device of Koizumi such that a guard ring is
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`provided in the semiconductor substrate such that the guard ring surrounds at least one of the
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`plurality of semiconductor devices with at least a single surrounding structure as taught by
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`Anderson.
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`One of ordinary skill in the art would have been motivated to incorporate the teaching of
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`Anderson in order to improve device performance by increasing the breakdown voltage or
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`lowering leakage current (see Anderson paragraph [0053]).
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`Response to Arguments
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`Applicant’s arguments, filed 12/19/2017, with respect to the rejection(s) of claim(s) 1
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`under 35 USC 103 regarding the device of Koizumi failing to teach all of the newly added
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`limitations of amended claim 1 have been fully considered and are persuasive. Therefore, the
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`rejection has been withdrawn. However, upon further consideration, a new ground(s) of
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`rejection is made in view of Umezaki.
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`Conclusion
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to David S. Wilbert whose telephone number is 571—272—401 1. The
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`examiner can normally be reached on Monday through Friday 7:30 to 17:00 EST.
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`Application/Control Number: 14/764,745
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`Page 8
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`Art Unit: 2899
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Dale Page can be reached at 571—270—7877. The fax phone number for the
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`organization Where this application or proceeding is assigned is 571—273—8300.
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`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published applications
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`may be obtained from either Private PAIR or Public PAIR. Status information for unpublished
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`applications is available through Private PAIR only. For more information about the PAIR
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`system, see http://pair—direct.uspto.gov. Should you have questions on access to the Private PAIR
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`system, contact the Electronic Business Center (EBC) at 866—217—9197 (toll—free). If you would
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`like assistance from a USPTO Customer Service Representative or access to the automated
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`information system, call 800—786—9199 (IN USA OR CANADA) or 571—272—1000.
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`/David S Wilbert/
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`Examiner, Art Unit 2899
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`/Su C. Kim/
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`Primary Examiner, Art Unit 2899
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`