UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`PO. Box 1450
`Alexandria, Virginia 2231371450
`www.uspto.gov
`
`15/240,305
`
`08/18/2016
`
`Masatoshi UENO
`
`HOKUP0327US
`
`5340
`
`MARK D. SARALINO (PAN)
`RENNER, OTTO, BOISSELLE & SKLAR, LLP
`1621 EUCLID AVENUE
`19TH FLOOR
`CLEVELAND, OH 44115
`
`YESILDAG LAURA G
`
`ART UNIT
`2844
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`PAPER NUMBER
`
`NOTIFICATION DATE
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`DELIVERY MODE
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`03/05/2020
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`ELECTRONIC
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`Please find below and/or attached an Office communication concerning this application or proceeding.
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`The time period for reply, if any, is set in the attached communication.
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`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
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`following e—mail address(es):
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`ipdoeket@rennerotto.eom
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`PTOL-90A (Rev. 04/07)
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`

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`0/7709 A0170” Summary
`
`Application No.
`15/240,305
`Examiner
`LAU RA YESILDAG
`
`Applicant(s)
`UENO etal.
`Art Unit
`2844
`
`AIA (FITF) Status
`Yes
`
`- The MAILING DA TE of this communication appears on the cover sheet wit/7 the correspondence address -
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR 1.136(a). In no event, however, may a reply be timely filed after SIX (6) MONTHS from the mailing
`date of this communication.
`|f NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
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`1). Responsive to communication(s) filed on 2/13/2020.
`CI A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
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`2a)[:] This action is FINAL.
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`2b)
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`This action is non-final.
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`3)[:] An election was made by the applicant in response to a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
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`4):] Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Expade Quay/e, 1935 CD. 11, 453 O.G. 213.
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`Disposition of Claims*
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`5)
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`Claim(s)
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`1—12 is/are pending in the application.
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`5a) Of the above claim(s) fl is/are withdrawn from consideration.
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`
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`E] Claim(ss)
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`is/are allowed.
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`Claim(ss) 1_—5 is/are rejected.
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`1:] Claim(ss_) is/are objected to.
`
`) ) ) )
`
`S)
`are subject to restriction and/or election requirement
`C] Claim(s
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`
`httpfiwww.”smogovmatentsflnit_events[pph[index.'§p or send an inquiry to PPeredhack@gsptg.ggv.
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`Application Papers
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`10):] The specification is objected to by the Examiner.
`
`is/are: a)[:| accepted or b)D objected to by the Examiner.
`11):] The drawing(s) filed on
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
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`Priority under 35 U.S.C. § 119
`
`12):] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
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`a)i:i All
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`b)C] Some**
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`c)C] None of the:
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`1.1:] Certified copies of the priority documents have been received.
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`2.[:] Certified copies of the priority documents have been received in Application No.
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`SD Copies of the certified copies of the priority documents have been received in this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`
`** See the attached detailed Office action for a list of the certified copies not received.
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`Attachment(s)
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`1)
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`Notice of References Cited (PTO-892)
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`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date_
`U.S. Patent and Trademark Office
`
`3) E] Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`4) CI Other-
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`PTOL-326 (Rev. 11-13)
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`Office Action Summary
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`Part of Paper No./Mai| Date 20200227
`
`

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`Application/Control Number:15/240,305
`Art Unitz2844
`
`Page2
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`DETAILED ACTION
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`The present application, filed on or after March 16, 2013, is being examined under the
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`first inventor to file provisions of the AIA.
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`Continued Examination Under 37 CFR 1.114
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`A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth
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`in 37 CFR l.l7(e), was filed in this application after final rejection. Since this application is eligible
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`for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR l.l7(e) has been
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`timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR
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`1.114. Applicant's submission filed on 2/13/2020 has been entered.
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`Information Disclosure Statement
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`The information disclosure statement (IDS) submitted on 1/17/2020 has been received,
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`and based on the provisions of 37 CFR 1.97, the IDS has been considered by the Examiner.
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`Claim Rejections - 35 USC § 103
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`The following is a quotation of 35 U.S.C.103 which forms the basis for all obviousness
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`rejections set forth in this Office action:
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`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention
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`is not identically disclosed as set forth in section 102 of this title, if the differences between the
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`claimed invention and the prior art are such that the claimed invention as a whole would have
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`been obvious before the effective filing date of the claimed invention to a person having ordinary
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`skill in the art to which the claimed invention pertains. Patentability shall not be negated by the
`manner in which the invention was made.
`
`

`

`Application/Control Number:15/240,305
`Art Unitz2844
`
`Page3
`
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`Note: In the event the determination of the status of the application as subject to AIA 35 U.S.C.
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`102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory
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`basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and
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`the rationale supporting the rejection, would be the same under either status.
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`Claims 1-5 are re'ected under 35 U.S.C. 103 as bein
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`un atentable over Ara ai US
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`2013 0062936 in view of Kami a US 2015 0001924 in further view of Schimel US Pat.
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`10,199,843).
`
`Regarding claim 1,
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`Aragai discloses in Figs.
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`1—9 a lighting control device (load control device 112/311)
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`comprising:
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`a controller (first command part controller 121/321 or CPU 232) configured to output a
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`control signal based on an indicating signal indicating whether to turn on or off a light
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`source of a vehicle ([0067] first command part 121 receives an indicating signal from the
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`manipulation part indicating to start or stop the load 113, and [0068] Based on a manipulation
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`signal from the manipulation part 111, the first command part 121 issues a command to the
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`electric—power supply controller 124 to supply the electric power to the load 113, and [0084]
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`CPU 232 can detect whether the ignition switch or the power switch is to set to the ignition
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`or the on state based on a detection result of the on and off states of the ignition power
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`source and [0121]);
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`a diagnosis circuit (monitor circuit 122 or WDT IC 233) configured to output a first signal
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`when detecting irregular operation of the controller ([0038—0039] a monitor circuit that
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`monitors existence or non—existence of an abnormality of the first command part controller,
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`and outputs a fault detection signal when the abnormality of the first command part is
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`

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`Application/Control Number:15/240,305
`Art Unitz2844
`
`Page4
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`detected, and [0069] fault detection or reset signal is outputted when the monitor detects
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`abnormality of the first command part);
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`a latch circuit (second command pa rt |C circuit 123/ 322, transistor integrating circuit 234)
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`configured to set second signal in a first state until receiving the first signal and set the
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`second signal in a second state when receiving the first signal ([0029—0032] the second
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`command part issues the second command while the first command part operates normally
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`and [0014] the second command part issues the second command to supply the electric
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`power to the load when the reset signal is inputted from the monitor and [0070], [0102] and
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`[0147]); and
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`a logic circuit (power supply controller 124 or high—side driver 32/235) configured to:
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`receive an ignition signal indicating whether a motor of the vehicle is in an
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`activated state or a rest state, the control signal and the second signal ([0007] high side
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`driver 32 receives ignition signal as input voltage similar to the command signal inputted
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`and [0084] CPU 232 detects the ON and OFF states ofthe ignition power source based on
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`the input voltage), the logic circuit being configured to: control the light source in
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`accordance with the control signal while the second signal is in the first state, and
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`control the light source in accordance with the ignition signal while the second signal is
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`in the second state ([0104] Based on lighting command signal or the abnormal state
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`lighting command signal, the high—side driver 235 controls the lighting and turn—off of the
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`headlight and [0120] the CPU 232 controls the output of the lighting command signal
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`based on the state of the ignition power source IG providing input voltage signal and
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`[0121] the CPU 232 stops the output of the lighting command signal while the lighting
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`

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`Application/Control Number:15/240,305
`Art Unitz2844
`
`Page5
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`command signal is set to the low level state, while the off state of the ignition power
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`source IG is detected. Therefore, the headlight 213 is turned off. The CPU turns on the
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`headlight 123 when ON state of the ignition power source IG is detected and the lighting
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`command signal is on high level state, therefore the headlight 123 is lit and [0122] even
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`if the CPU 232 has communication failure, the ignition switch of the vehicle is set to the
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`ignition to turn on the ignition power source IG, which allows the headlight 213 to be lit,
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`electric—power supply logic controller controls the supply of the electric power to the load
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`based on the first command and/or the second command).
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`the lighting control device further comprising a switch configured to be electrically
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`connected between a power supply and the diagnostic circuit,
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`the power supply being
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`configured to supply electrical power to the controller and the diagnosis circuit (elect ric—power
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`supply controller 124 to supply the electric power and component 323 includes switching
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`element such as a transistor and monitor circuit 122 or WDT IC 233 and [0038—0039] second
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`command part that issues a second command to supply the electric power to the load when the
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`fault detection signal is inputted from the monitor; and an electric—power supply controller that
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`controls the supply of the electric power to the load based on the first command or the second
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`command, and the first command part issues the first command to supply the electric power to
`
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`the load based on the signal from the manipulation part), and
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`the latch circuit being configured to turn off the switch when receiving the first signal
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`([0129] The reset signal outputted from the WDT IC 233 is inputted to the drive retaining and
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`integrating circuit 234 or second command part. and the transistor TR21 is turned off while the
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`reset signal is set to the high level)
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`

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`Application/Control Number:15/240,305
`Art Unitz2844
`
`Page6
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`Although the limitations are disclosed by Aragai as cited above, it may not explicitly specify
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`nonetheless, Kamiya discloses a logic circuit configured to control the load or light source in
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`accordance with control signal while the second signal is in the first state ([0018] and [0020]
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`and control the light source in accordance with the ignition signal while the second signal is in
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`the second state ([0012—0013]).
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`Thus, prior to the effective filing date of the claimed invention, it would have been obvious
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`to one of ordinary skill in the art to recognize the benefit of modifying Aragai by incorporating
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`the features taught Kamiya in order to further enhance the logic circuit of Aragai to ”provide a
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`latching relay drive circuit used for a vehicle which, even when a trouble is caused to a control
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`signal output of a controller, enables to arbitrarily turn on and off the latching relay used for
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`turning on and off a load of a vehicle according to usage condition and the like of the load."
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`([0011]), thus, even when the trouble is caused to the control signal output of the controller of
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`the vehicle, the latching relay can be turned on or off [0014]).
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`Furthermore, although the combination teaches all of the limitations above, perhaps it may
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`not explicitly specify yet Schimel discloses:
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`the latch circuit being configured to turn on the switch when receiving a reset signal from
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`the controller so as to supply electrical power to the diagnosis circuit (claim 1: a controller
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`comprising a fault detection circuit configured to detect a fault condition within a power system,
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`the fault latch configured to keep the transistors off from a time that the fault condition is
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`detected until a reset signal is received).
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`Thus, prior to the effective filing date of the claimed invention, it would have been obvious
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`to one of ordinary skill in the art to recognize the benefit of modifying Aragai by incorporating
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`

`

`Application/Control Number:15/240,305
`Art Unit:2844
`
`Page7
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`the features ofthe latch circuit configured to turn on the switches when receiving the reset signal
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`in order for ”enabling fast, reliable, and safe connection and disconnection ofa battery pack from
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`its load or charging source, even under high current operating conditions." (Schimel
`
`in
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`Background).
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`Regarding claim 2, the combination prior art discloses lighting control device according to
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`claim 1, wherein the controller is configured in Fig.1 and 9 to set the control signal in a first state
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`when the indicating signal indicates turning on the light source and set the control signal in a
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`second state when the indicating signal indicates turning off the light source and ignition signal
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`is in a first state while the motor of the vehicle is in the activated state; the ignition signal is in a
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`second state while the motor of the vehicle is in the rest state, the logic circuit is configured to
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`turn on the light source while the second signal is in the first state and the control signal is in the
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`first state, turn off the light source while the second signal is in the first state and the control
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`signal is in the second state, turn on the light source while the second_signa| is in the second state
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`and the ignition signal is in the first state, and turn off the light source while the second signal is
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`in the second state and the ignition signal is in the second state ([0084], [0121—122], [0129],
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`[0135L[0187D.
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`Regarding claim 3, the combination prior art discloses that the latch circuit is configured to
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`set the second signal
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`in the first state when receiving a reset signal
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`is configured to when
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`determining that the controller can communicate with a sender outputting the indicating signal
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`

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`Application/Control Number:15/240,305
`Art Unit:2844
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`Page8
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`output reset signal to the latch circuit at a timing of setting the control signal in either the first or
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`second state ([0121—122] and [0103] and [0208]).
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`Regarding claim 4, the combination prior art discloses that the latch circuit is configured to
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`set the second signal
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`in the first state when receiving a reset signal and the controller is
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`configured to when determining that the controller can communicate with a sender outputting
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`the indicating signal output reset signal to the latch circuit at a timing of setting the ignition signal
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`in either the first or second state ([0084], [0103], [0121—122] and [0208]).
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`Regarding claim 5, the combination prior art discloses the latch circuit is configured to set
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`the second signal in the first state when receiving a reset signal and the controller is configured
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`to start a process of periodically outputting the reset signal to the latch circuit when determining
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`that the controller can communicate with a sender outputting the indicating signal ([0068],
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`[0086], [0114], [0123]).
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`Response to Amendment and Arguments
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`Based on Applicant’s amendment new prior art has been provided to teach the amended
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`portions and thus the claims still do not overcome the prior art.
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`Conclusion
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`Any inquiry concerning this communication or earlier communications from the examiner
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`should be directed to LAURA YESILDAG whose telephone number is (571) 270—5066. Examiner
`
`

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`Application/Control Number:15/240,305
`Art Unit:2844
`
`Page9
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`

`

`Application/Control Number:15/240,305
`Art Unit:2844
`
`/Laww Ye/yi/Lotag/
`
`Patent Examiner, Art Unit 2844
`
`/J|MMY T VU/
`
`Primary Examiner, Art Unit 2844
`
`PagelO
`
`