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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMIVHSSIONER FOR PATENTS
`PO. Box 1450
`Alexandria1 Virginia 22313-1450
`wwwusptogov
`
`
`
`
`
`15/280,554
`
`09/29/2016
`
`Tetsuo FUKAMI
`
`20326.0086US01
`
`7752
`
`09/20/2018 —HAMRE, SCHUMANN,MUELLER&LARSONP.C. m
`7590
`53148
`45 South Seventh Street
`MATTHEWS, ANDRE L
`Suite 2700
`MINNEAPOLIS, MN 55402- 1683
`
`PAPER NUMBER
`
`ART UNIT
`2621
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`09/20/2018
`
`ELECTRONIC
`
`Please find below and/0r attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the
`following e—mail address(es):
`PTOMail @hsml.com
`
`PTOL—90A (Rev. 04/07)
`
`

`

`
`
`Applicant(s)
`Application No.
` 15/280,554 FUKAMI ET AL.
`
`Examiner
`Art Unit
`AIA (First Inventor to File)
`Office Action Summary
`
`ANDRE MATTHEWS $2215 2621
`
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTHS FROM THE MAILING DATE OF
`THIS COMMUNICATION.
`Extensions of time may be available under the provisions of 37 CFR1. 136( a).
`after SIX () MONTHS from the mailing date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any
`earned patent term adjustment. See 37 CFR 1 .704(b).
`
`In no event, however, may a reply be timely filed
`
`Status
`
`1)IZI Responsive to communication(s) filed on 9/29/2018.
`El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on
`
`2b)|ZI This action is non-final.
`2a)|:l This action is FINAL.
`3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on
`
`; the restriction requirement and election have been incorporated into this action.
`
`4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
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`closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.
`
`Disposition of Claims*
`
`5)IZI CIaim(s)1-_12is/are pending in the application.
`5a) Of the above claim(s)
`is/are withdrawn from consideration.
`
`is/are allowed.
`6)I:I Claim(s)
`7)|Z| CIaim(s)_1-12 is/are rejected.
`
`8)|:I Claim(s)
`is/are objected to.
`
`
`9)IXI Claim((s) 7-12 are subject to restriction and/or election requirement.
`* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a
`
`participating intellectual property office for the corresponding application. For more information, please see
`
`
`
`:/'I’vaIW.usnI‘.0. ovI’ atentS/init events/
`iindex.‘s orsend an inquiry to PPI-iieedback{®usgtc.00v.
`
`hit
`
`Application Papers
`
`10)I:l The specification is objected to by the Examiner.
`11)|Xl The drawing(s) filed on 9/29/2016is/are: a)lX| accepted or b)I:I objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`
`12)IXI Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`
`a)IZl All
`
`b)|:l Some” c)I:l None of the:
`
`1.IXI Certified copies of the priority documents have been received.
`2.|:l Certified copies of the priority documents have been received in Application No.
`3.|:| Copies of the certified copies of the priority documents have been received in this National Stage
`
`application from the International Bureau (PCT Rule 17.2(a)).
`** See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`
`
`3) D Interview Summary (PTO-413)
`1) E Notice of References Cited (PTO-892)
`Paper No(s)/Mai| Date.
`.
`.
`4) I:I Other'
`2) E InformatIon DIsclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mai| Date
`
`US. Patent and Trademark Office
`PTOL—326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mai| Date 20180917
`
`

`

`Application/Control Number: 15/280,554
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`Page 2
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`Art Unit: 2621
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`1.
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`The present application, filed on or after March 16, 2013, is being examined
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`under the first inventor to file provisions of the AIA.
`
`DETAILED ACTION
`
`Election/Restrictions
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`2.
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`Applicant’s election without traverse of Species drawn to Fig. 10 and expressed
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`in elected claims 1-6 in the reply filed on 5/14/2018 is acknowledged.
`
`Claim Rejections - 35 USC § 1 12
`
`3.
`
`The following is a quotation of 35 U.S.C. 112(b):
`
`(b) CONCLUSION—The specification shall conclude with one or more claims particularly
`pointing out and distinctly claiming the subject matter which the inventor or a joint inventor
`regards as the invention.
`
`The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph:
`
`The specification shall conclude with one or more claims particularly pointing out and distinctly
`claiming the subject matter which the applicant regards as his invention.
`
`4.
`
`Claim 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second
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`paragraph, as being indefinite for failing to particularly point out and distinctly claim the
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`subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards
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`as the invention. Claim 3 recites wherein the control electrodes for each of the plurality
`
`of selector transistors included in a block among the plurality of blocks are formed in
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`one piece. It is unclear what defines being "formed in one piece".
`
`Claim Rejections - 35 USC § 102
`
`5.
`
`The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that
`
`form the basis for the rejections under this section made in this Office action:
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`A person shall be entitled to a patent unless —
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`

`

`Application/Control Number: 15/280,554
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`Page 3
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`Art Unit: 2621
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`(a)(1) the claimed invention was patented, described in a printed publication, or in public use,
`on sale or otherwise available to the public before the effective filing date of the claimed
`invention.
`
`6.
`
`Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by
`
`Kawachi (US 2015/0029081).
`
`7.
`
`Regarding claim 1, Kawachi teaches A display device, comprising:
`
`a plurality of groups, each group having a plurality of data lines extending in a first
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`direction (Fig. 2,11,19 data lines yn)and a plurality of gate lines extending in a
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`second direction (Figs. 2, 11, 19 gate lies xn), wherein the plurality of gate lines for
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`each group are adjacent in the first, direction (Fig. 4 [0072-0073] teach how scan lines
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`x are grouped to selection lines 61); a plurality of blocks, each block including: a
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`plurality of selector transistors and each of the plurality of selector transistors includes: a
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`first conductive electrode connected to an end of a corresponding gate line of the
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`plurality of gate lines, a second conductive electrode, and a control electrode (Figs. 4,
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`[0078] transistor 63 is connected to scan line 61x and selection lines 62), wherein
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`each block among the plurality of blocks corresponds to a group among the plurality of
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`the groups (Fig. 4 groups are defined by TFTs connected to the same scan line 61x
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`or the same selection line 62); a plurality of selection signal supplying wirings each of
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`which is connected to the control electrode of each of the plurality of selector
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`transistors for a corresponding block of the plurality of blocks (Fig. 4 selection lines 62
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`are connected to transistors 63); a plurality of gate voltage supplying wirings each of
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`which is connected to the second conductive electrode of one of the plurality of selector
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`transistors in each of the groups(Fig. 4 groups are defined by TFTs connected to the
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`

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`Application/Control Number: 15/280,554
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`Page 4
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`Art Unit: 2621
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`scan line 61x and selection line 62); and a gate driver that sequentially supplies a
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`gate voltage to the plurality of gate voltage supplying wirings and supplies a control
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`voltage to the plurality of selection signal supplying wirings to turn on or off one or more
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`of the plurality of selector transistors([0082]) and a light shielding part that is disposed
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`between at least two adjacent blocks among the plurality of blocks ([0094] teaches the
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`scanning lines 61 can act as light-blocking to inhibit light transmission to the
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`color filter substrate).
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`Regarding claim 2, Kawachi teaches wherein a first block and a second block among
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`the plurality of blocks are sequentially arranged in a scanning direction(Fig. 4 groups
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`are defined by TFTs connected to the same scan line 61x or the same selection
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`line 62 and shows groups sequentially arranged), and the light shielding part is
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`disposed between a selector transistor connected to a gate line scanned last in the first
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`block and a selector transistor connected to a gate line scanned first in the second
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`block([0094] teaches the scanning lines 61 can act as light-blocking to inhibit light
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`transmission to the color filter substrate).
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`Regarding claim 3, Kawachi teaches wherein the control electrodes for each of
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`the plurality of selector transistors included in a block among the plurality of blocks are
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`formed in one piece (Fig. 4 groups are defined by TFT electrodes connected to the
`
`same scan line 61x or the same selection line 62 and shows groups sequentially
`
`arranged).
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`Regarding claim 4, Kawachi teaches wherein the light shielding part is an
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`extended part of the control electrode of a selector transistor among the plurality of
`
`

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`Application/Control Number: 15/280,554
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`Page 5
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`Art Unit: 2621
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`selector transistors([0094] teaches the scanning lines 61 can act as light-blocking
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`to inhibit light transmission to the color filter substrate. Scanning lines extended
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`from electrodes).
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`Claim Rejections - 35 USC § 103
`
`8.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all
`
`obviousness rejections set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed
`invention is not identically disclosed as set forth in section 102, if the differences between the
`claimed invention and the prior art are such that the claimed invention as a whole would have
`been obvious before the effective filing date of the claimed invention to a person having
`ordinary skill in the art to which the claimed invention pertains. Patentability shall not be
`negated by the manner in which the invention was made.
`
`9.
`
`Claims 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over
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`Kawachi (US 2015/0029081) in view of Yuminami (2016/0070130).
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`10.
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`Regarding claim 5, Kawachi teaches the limitations as discussed above and also
`
`teaches a light blocking function of a scan line, but fails to teach wherein the light
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`shielding part includes a dummy transistor that has a control electrode, and the control
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`electrode of each of the plurality of selector transistors included in a first block among
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`the plurality of blocks and the control electrode of the dummy transistor adjacent to the
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`first block are integrally formed.
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`However in the same field of disposing light blocking elements in a display device
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`Yuminami teaches wherein the light shielding part includes a dummy transistor that has
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`a control electrode, and the control electrode of each of the plurality of selector
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`transistors included in a first block among the plurality of blocks and the control
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`electrode of the dummy transistor adjacent to the first block are integrally formed (Figs.
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`6-7 [0078] teaches a dummy gate line 31a (i.e. scanning line) connected to a
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`

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`Application/Control Number: 15/280,554
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`Page 6
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`Art Unit: 2621
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`dummy TFT of a dummy pixel having light blocking properties disposed in the
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`non-display area of the panel. Fig. 7 shows the plurality of dummy pixels 31 along
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`the same dummy gate line 31 a, therefore the control electrodes of the TFT are
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`integrally (as a whole) formed by this identical connection).
`
`Therefore it would have been obvious to one of ordinary skill at the time of the
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`effective filing date to combine the light blocking method as taught by Kawachi with the
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`light blocking method as taught by Yuminami. This combination would provide a display
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`that reduce shadow and improve appearances of the panel as taught by Yuminami
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`[0005i
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`Regarding claim 6, Yuminami teaches wherein the dummy transistor includes a
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`first conductive electrode and a second conductive electrode (dummy TFT of dummy
`
`pixel 31), wherein each of the plurality of selection signal supplying wirings is not
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`connected to the first conductive electrode and the second conductive electrode of the
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`dummy transistor (dummy gate line 31a connected to dummy TFT. This well known
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`the gate line is connected to gate electrode), and wherein each of the plurality of
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`gate voltage supplying wirings (regular gate lines 19) is not connected to the first
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`conductive electrode and the second conductive electrode of the dummy transistor (Fig.
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`7 and [0078] show dummy pixels 31 connected to dummy gate lines 31a and not
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`pixel gate lines 19).
`
`Conclusion
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to ANDRE MATTHEWS whose telephone number is
`
`

`

`Application/Control Number: 15/280,554
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`Page 7
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`Art Unit: 2621
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`(571 )270-5806. The examiner can normally be reached on Monday-Friday alternating
`
`Fridays.
`
`Examiner interviews are available via telephone, in-person, and video
`
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`
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`
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`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
`
`supervisor, Amr Awad can be reached on 571 -272-7764. The fax phone number for the
`
`organization where this application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the
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`
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`***
`
`/AN DRE MATTH EWS/
`
`Examiner
`
`Art Unit 2621
`
`

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`Application/Control Number: 15/280,554
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`Page 8
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`Art Unit: 2621
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