`Reply to Office Action dated March 27, 2018
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`Amendments to the Claims:
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`This listing of claims will replace all prior versions, and listings, of claims in the
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`application:
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`Listing of Claims:
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`1.
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`(Currently Amended) A turbo equalization device for repeating a turbo
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`equalization process, including an equalization process and a decoding process, M times on an
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`input signal, M being an integer equal to or greater than 1, the turbo equalization device
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`comprising:
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`equalization circuitry, which in operation, performs the an—equalization process fl
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` the input signal and a decoding signal U
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`
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`control circuitry, which in operation, updates determines-an iteration number N of
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`th_ea—decoding process for each time the turbo equalization process is performed, them—times
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`
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`algeri—thmTN being is—an integer equal to or greater mere—than 1, and
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`decoding circuitry, which in operation, repeats the perferm-s—a—decoding process—N
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`eHess—times—erkthe—m4imes—equalizatierkpreeessed—inpm—signal on the equalized signal by the
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`iteration number N or less and outputs the decoded signal to the equalization circuitpy, wherein:
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`the decoding processing uses an error correcting code that uses a belief
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`propagation algorithm.
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`2.
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`(Currently Amended) The turbo equalization device according to claim 1,
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`wherein
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`
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`Application No. 15/453,481
`Reply to Office Action dated March 27, 2018
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`the control circuitry updates determines—the iteration number N of the decoding
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`process in the Mth time turbo equalization process to Me—PA—ti-mes—eq-u-al-i—zatien—preeessed
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`input—signal—te—be—a value larger than the iteration number N of the decoding process in the first
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`time turbo equalization process£eiLene—times—equali—zatien—preeessed—input—signal
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`3.
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`(Currently Amended) The turbo equalization deVice according to claim 2
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`7
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`wherein
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`the control circuitry up_dates determines—the iteration number N of the decoding
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`process to be an increased value for each time the turbo equalization process is repeated—fer—the
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`4.
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`(Currently Amended) The turbo equalization deVice according to claim 2,
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`wherein
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`the control circuitry
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`includes a look-up table (LUT) where the—iteratien—riumbeFm—ellthe
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`equalization—preeess—and—the iteration number N of the decoding process are related to each
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`repetition of the turbo equalization process—ether, and
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`Wdetenni-nes-the iteration number N of the decoding process is
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`iterated according to the LUT.
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`5.
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`(Original) The turbo equalization deVice according to claim 1, wherein
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`the error correcting code is a low-density parity check (LDPC) code.
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`6.
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`(Currently Amended) A turbo equalization method for repeating a turbo
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`equalization process including an equalization process and a decoding process M times on an
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`input signal, M being an integer equal to or greater than 1, method comprising:
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`performing the arr—equalization process on the input signal and a decoding signal
`
`
`
`
`
`Application No. 15/453,481
`Reply to Office Action dated March 27, 2018
`
`
`
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`updating determining-an iteration number N of th_ea—decoding process for each
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`time the turbo egualization process is performed—the—m—times—equali—zatierkpreeessed—input—signal
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`
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`greater mere-than 1; and
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`repeating the perfermi—ng—a—decoding process on the egualized signal by the
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`iteration number N or less and outputting the decoded signal to the egualization process:
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`wherein:
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`the decoding process uses an error correcting code that uses a belief
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`propagation algoritth-OHWWWWWW.
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