Application No.: 17/190,261
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`AMENDMENT TO THE CLAIMS
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`The following claim listing replaces all prior listings and versions of the claims:
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`1. (Currently Amended) A semiconductor device comprising:
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`LISTING OF CLAIMS
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`a nitride semiconductor chip including a silicon substrate having a first thermal expansion
`
`coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where
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`O<x<1,0<y<1,0<x+ty <1, the nitride semiconductor chip having a thickness ofat least
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`0.250 mm and at most 0.350 mm,and including a heterojunction interface including a two-
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`dimensional electron gaslayer;
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`a plurality of pads including a gate pad, a source pad, and a drain pad,the plurality of
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`pads being provided on a top side ofthe nitride semiconductor chip;
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`a die pad including Cu and having a second thermal expansion coefficient that is greater
`
`than the first thermal expansion coefficient;
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`an adhesive that joins a backside of the nitride semiconductor chip and the die pad;
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`a plurality of terminals including a gate terminal, a-phiralitef two source terminals, and
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`a plurality of drain terminals; and
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`a first electrode whichis electrically connected to the phiraltef two source terminals
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`and the die pad, wherein:
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`the semiconductor device is a rectangular package havinga first side and a secondside
`
`that are two opposed sides and longersides of the rectangular package,
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`
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`the plurality of drain terminals are disposed along the secondside of the semiconductor
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`device,
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`the plurality of drain terminals are separated from the die pad,
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`a distance from the secondside to a center of the die pad in a plan view ofthe
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`semiconductor device is longer than a distance from thefirst side to the center of the die pad,
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`each source terminal among the phiralty-ef two source terminals is connected to the source pad
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`by a plurality of first bonding wires including gold, and an end of each ofthe plurality of first
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`bonding wiresis provided at a position overlapping the phiralty-ef two source terminals in the
`
`plan view,
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`
`
`AMENDMENT TO THE CLAIMS
`
`The following claim listing replaces all prior listings and versions of the claims:
`
`1. (Currently Amended) A semiconductor device comprising:
`
`LISTING OF CLAIMS
`
`a nitride semiconductor chip including a silicon substrate having a first thermal expansion
`
`coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where
`
`O<x<1,0<y<1,0<x+ty <1, the nitride semiconductor chip having a thickness ofat least
`
`0.250 mm and at most 0.350 mm,and including a heterojunction interface including a two-
`
`dimensional electron gaslayer;
`
`a plurality of pads including a gate pad, a source pad, and a drain pad,the plurality of
`
`pads being provided on a top side ofthe nitride semiconductor chip;
`
`a die pad including Cu and having a second thermal expansion coefficient that is greater
`
`than the first thermal expansion coefficient;
`
`an adhesive that joins a backside of the nitride semiconductor chip and the die pad;
`
`a plurality of terminals including a gate terminal, a-phiralitef two source terminals, and
`
`a plurality of drain terminals; and
`
`a first electrode whichis electrically connected to the phiraltef two source terminals
`
`and the die pad, wherein:
`
`the semiconductor device is a rectangular package havinga first side and a secondside
`
`that are two opposed sides and longersides of the rectangular package,
`
`
`
`the plurality of drain terminals are disposed along the secondside of the semiconductor
`
`device,
`
`the plurality of drain terminals are separated from the die pad,
`
`a distance from the secondside to a center of the die pad in a plan view ofthe
`
`semiconductor device is longer than a distance from thefirst side to the center of the die pad,
`
`each source terminal among the phiralty-ef two source terminals is connected to the source pad
`
`by a plurality of first bonding wires including gold, and an end of each ofthe plurality of first
`
`bonding wiresis provided at a position overlapping the phiralty-ef two source terminals in the
`
`plan view,
`
`
`
`Application No.: 17/190,261
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`each drain terminals amongthe plurality of drain terminals is connected to the drain pad
`
`by a plurality of second bonding wires including gold, and an end of each ofthe plurality of
`
`second bonding wires is provided at a position overlapping the plurality of drain terminals in the
`
`plan view, [[and]]
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`each drain terminals among the plurality of drain terminals is connected to the drain pad
`
`by four of the plurality of second bonding wires,
`
`the semiconductor device further includes a source sensor terminal disposed along the
`
`first side of the semiconductor device
`
`the source sensor terminal is separated from the die pad,
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`the two source terminals, the source sensor terminal and the gate terminal are disposed
`
`along the first side of the semiconductor device in this order,
`
`the source sensor terminal and the source pad are connected with at least one third
`
`bonding wire, and
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`a numberofthe first bonding wires connecting each source terminal among the two
`
`source terminals and the source pad is greater than a numberofthe at least one third bonding
`
`wire.
`
`2. (Original) The semiconductor device according to claim 1, further comprising:
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`a second electrode which mutually and electrically connects the plurality of drain
`
`terminals.
`
`3. (Original) The semiconductor device according to claim 2,
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`wherein the second electrode includes a material same as a material of the die pad.
`
`4. (Original) The semiconductor device according to claim 1,
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`wherein the first electrode includes a material same as a material of the die pad.
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`5. (Original) The semiconductor device according to claim 1, further comprising:
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`a third electrode which is electrically connected to the gate terminal.
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`
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`Application No.: 17/190,261
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`6. (Original) The semiconductor device according to claim 5,
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`wherein the third electrode includes a material same as a material of the die pad.
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`7. (Original) The semiconductor device according to claim 1,
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`wherein the gate terminal is separated from the die pad.
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`8. (Currently Amended) The semiconductor device according to claim 1,
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`wherein the phiralityef two source terminals and the plurality of drain terminals are
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`disposed respectively at two opposedsides of the rectangular package.
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`9. (Original) The semiconductor device according to claim 1,
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`wherein the first side of the semiconductor device and the second side of the
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`semiconductor device have a same numberof terminals.
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`10. (Original) The semiconductor device according to claim 1, comprising:
`
`four drain terminals each of whichis a drain terminal of the plurality of drain terminals
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`and disposed along the secondside of the semiconductor device.
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`11. (Currently Amended) The semiconductor device according to claim 1, further
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`‘sine:
`
`wherein the [[a]] source sensor terminal is used for detecting a voltage level dispesed
`
`he
`
`ficst
`
`side
`
`of
`
`4
`
`‘cond
`
`levies.
`
`12. (Cancelled)
`
`13. (Original) The semiconductor device according to claim 1, wherein:
`
`the nitride semiconductor chip hasa first side and a secondside that are two opposed
`
`sides,
`
`the first side of the nitride semiconductorchip is parallel with the first side of the
`
`semiconductor device,
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`the secondside of the nitride semiconductorchip is parallel with the second side of the
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`
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`Application No.: 17/190,261
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`semiconductor device, and
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`the plurality of pads are disposed at the first side and the secondside ofthe nitride
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`semiconductorchip.
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`14. (Currently Amended) The semiconductor device according to claim 13, wherein:
`
`the source padis disposed alongthefirst side of the nitride semiconductor chip, and
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`the drain pad is disposed along the secondside of the nitride semiconductor chip.
`
`15. (Currently Amended) The semiconductor device according to claim 1,
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`wherein the-phirality-ef the two source terminals are each connected with a same number
`
`of the plurality of first bonding wires.
`
`16. (Cancelled)
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`17. (Original) The semiconductor device accordingto claim 1,
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`wherein out of two opposed main surfaces of the die pad, a main surface not joined to the
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`nitride semiconductor chip is exposed from the semiconductordevice.
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`18. (Original) The semiconductor device according to claim 1,
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`wherein the plurality of terminals are substantially flush with a lateral surface of the
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`rectangular package.
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`19. (Original) The semiconductor device according to claim 1,
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`wherein in a plan view of the semiconductor device, the plurality of terminals are
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`mutually equalin size.
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`20. (Original) The semiconductor device according to claim 1,
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`wherein the plurality of terminals provided on the first side of the semiconductor device
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`and the plurality of terminals provided on the secondside of the semiconductor device are
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`providedto be line- symmetrical to each other.
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`
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`Application No.: 17/190,261
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`21. (Original) The semiconductor device according to claim 1,
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`wherein a distance between adjacent ones ofthe plurality of terminals provided on the
`
`first side of the semiconductor device and a distance between adjacent onesofthe plurality of
`
`terminals provided on the second side of the semiconductor device are equal.
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`22. (Original) The semiconductor device accordingto claim 1,
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`wherein no bonding wire is connected to the die pad.
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`23. (Currently Amended) The semiconductor device according to claim [[11]] 1,
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`wherein all bonding wires connected to the source pad are connected to the two source
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`terminal terminals and [[or]] the source sensor terminal.
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`24. (Original) The semiconductor device according to claim 1,
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`wherein the nitride semiconductor chip is joined at a center portion of the die pad.
`
`25. (Original) The semiconductor device according to claim 1,
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`wherein a thickness tm (mm) of the die pad and a length L (mm)ofthe nitride
`semiconductorchipsatisfies a relationship of tm > 2.00 x 10° x L? +b (b> 0).
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`26. (Previously Presented) The semiconductor device according to claim 1,
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`wherein a base area anda side areaofthe plurality of terminals are equal.
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`27. (New) The semiconductor device according to claim 1, wherein:
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`a melting point of the adhesive is higher than a melting point of a secondary mounting
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`adhesive for mounting the semiconductor device on a printed circuit board, and
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`the adhesive includes Pb and has a melting point of at least 260 °C and at most 330 °C.
`
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