www.uspto.gov
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`17/636,672
`
`02/18/2022
`
`Naoaki FUJII
`
`065933-0830
`
`9070
`
`Rimon PC - Pansonic Corporation
`8300 Greensboro Dr
`Suite 500
`McLean, VA 22102
`
`DE LEON DOMENECH, RAFAEL O
`
`2838
`
`PAPER NUMBER
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`12/13/2023
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`USPTOmail@rimonlaw.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`Office Action Summary
`
`Application No.
`17/636,672
`
`Examiner
`RAFAEL O DE LEON
`DOMENECH
`
`Applicant(s)
`FUJII, Naoaki
`
`Art Unit
`2838
`
`AIA (FITF) Status
`Yes
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`A SHORTENED STATUTORYPERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensionsof time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`
`
`1) Responsive to communication(s) filed on 02/18/2022.
`CL} A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`
`2a)L) This action is FINAL. 2b)lv)This action is non-final.
`3) An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on__; the restriction requirement and election have been incorporatedinto this action.
`4)() Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`1-11 is/are pending in the application.
`)
`Claim(s)
`5a) Of the aboveclaim(s)
`is/are withdrawn from consideration.
`[) Claim(s) _ is/are allowed.
`Claim(s) 1-11 is/are rejected.
`C) Claim(s) _ is/are objected to.
`£) Claim(s)
`are subjectto restriction and/or election requirement
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http:/Awww.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`Application Papers
`10)C The specification is objected to by the Examiner.
`11) The drawing(s) filed on 02/18/2022 is/are: a)[¥) accepted or b)() objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)(¥] Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d)or (f).
`Certified copies:
`cc) None ofthe:
`b)J Some**
`a) All
`1.{¥] Certified copies of the priority documents have been received.
`2.0.) Certified copies of the priority documents have been received in Application No.
`3.2.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`*“ See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1)
`
`Notice of References Cited (PTO-892)
`
`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`
`3) [9 Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`(7) Other:
`
`4)
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20231207
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 2
`
`DETAILED ACTION
`
`This Office action is in response to the Preliminary amendmentfiled on February 18,
`
`2022.
`
`Notice of Pre-AlA or AIA Status
`
`The present application, filed on or after March 16, 2013, is being examined under the
`
`first inventor to file provisions of the AIA.
`
`In the event the determination of the status of the application as subject to AIA 35
`
`U.S.C. 102 and 103 (or as subject to pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction
`
`of the statutory basis for the rejection will not be considered a new ground of rejection if the
`
`prior art relied upon, and the rationale supporting the rejection, would be the same under
`
`either status.
`
`Receipt is acknowledgedof certified copies of papers required by 37 CFR 1.55.
`
`Priority
`
`Information Disclosure Statement
`
`The information disclosure statement (IDS) submitted on 02/18/2022 and 09/29/2022
`
`are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure
`
`statementis being considered by the examiner.
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 3
`
`Drawings
`
`The drawings werefiled on February 18, 2022. These drawings are accepted by the
`
`Examiner.
`
`The title of the invention is not descriptive. A new title is required that is clearly
`
`indicative of the invention to which the claims are directed.
`
`The lengthy specification has not been checked to the extent necessary to determine
`
`the presence ofall possible minor errors. Applicant’s cooperation is requested in correcting any
`
`errors of which applicant may become awarein the specification.
`
`Claim Rejections - 35 USC § 103
`
`In the event the determination of the status of the application as subject to AIA 35
`
`U.S.C. 102 and 103 (or as subject to pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction
`
`of the statutory basis for the rejection will not be considered a new ground of rejection if the
`
`prior art relied upon, and the rationale supporting the rejection, would be the same under
`
`either status.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness
`
`rejections set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is
`not identically disclosed as set forth in section 102, if the differences between the claimed invention
`and the prior art are such that the claimed invention as a whole would have been obvious before the
`effective filing date of the claimed invention to a person having ordinaryskill in the art to which the
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 4
`
`claimed invention pertains. Patentability shall not be negated by the manner in which the invention
`was made.
`
`The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459
`
`(1966), that are applied for establishing a background for determining obviousness under 35
`
`U.S.C. 103 are summarized as follows:
`
`1. Determining the scope and contents of the prior art.
`
`2. Ascertaining the differences between the prior art and the claims at issue.
`
`3. Resolving the level of ordinary skill in the pertinent art.
`
`4. Considering objective evidence present in the application indicating obviousnessor
`
`nonobviousness.
`
`Claims 1-8 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over
`
`KIDERAet al. (U.S. Pub. No. 2017/0155321 A1) in view of FUJI (U.S. Pub. No. 2012/0319664
`
`Al).
`
`In re claim 1, KIDERA discloses (Fig. 1) a DC-DC converter (comprising circuit elements 1-
`
`4) comprising:
`
`a first flying capacitor circuit (1) and a second flying capacitor circuit (2) connected in
`
`series so as to bein parallel to a high voltage side DC part (See Fig. 1); and wherein
`
`a midpoint (midpoint of 2) of the second flying capacitor circuit (2) is connected to a
`
`negative side terminal of the low voltage side DC part (See Fig. 1), and
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 5
`
`a node (node between 1 and 2) between the first flying capacitor circuit (1) and the
`
`second flying capacitor circuit (2) is connected to an intermediate potential node (100) of the
`
`high voltage side DC part.
`
`KIDERA fails to disclose a reactor connected between a positive side terminal of a low
`
`voltage side DC part and a midpoint ofthe first flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), comprising a reactor (L1) connected between a
`
`positive side terminal of a low voltage side DC part (Vbat) and a midpoint of the capacitor
`
`circuit (L1 is connected to the midpoint between S1 and S2).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected between a positive side terminal of a low voltage side DC part and a midpoint of the
`
`first flying capacitor circuit, as disclosed in FUJI to provide a DC power supply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of power at the load (Para. 0008).
`
`In re claim 2, KIDERA discloses a DC-DC converter (Fig. 1) comprising:
`
`a first flying capacitor circuit (1) and a second flying capacitor circuit (2) connected in
`
`series so as to bein parallel to a high voltage side DC part (See Fig. 1); and
`
`wherein a midpoint of the first flying capacitor circuit (midpoint of 1) is connected to a
`
`positive side terminal of the low voltage side DC part (See Fig. 1), and
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 6
`
`a node (node between 1 and 2) between the first flying capacitor circuit (1) and the
`
`second flying capacitor circuit (2) is connected to an intermediate potential node (100) of the
`
`high voltage side DC part.
`
`KIDERA fails to disclose a reactor connected between a negative side terminal of a low
`
`voltage side DC part and a midpoint of the second flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), a reactor (L2) connected between a negative
`
`side terminal of a low voltage side DC part (Vbat) and a midpoint of the second flying capacitor
`
`circuit (L2 is connected to the midpoint between S3 and S4).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected between a negative side terminal of a low voltage side DC part and a midpoint of the
`
`second flying capacitor circuit, as disclosed in FUJI to provide a DC power supply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of power at the load (Para. 0008).
`
`In re claim 3, KIDERA discloses (Fig. 1) a control unit (9) that controls the first flying
`
`capacitor circuit (1) and the second flying capacitor circuit (2) to perform at least one of power
`
`transfer from the low voltage side DC part to the high voltage side DC part in a step-up
`
`operation or power transfer from the high voltage side DC part to the low voltage side DC part
`
`in a step-down operation (Para. 0081-0085).
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 7
`
`In re claim 4, KIDERA discloses (Fig. 1) wherein the first flying capacitor circuit (1)
`
`includes: a first switching element (Q1), a second switching element (Q2), a third switching
`
`element (Q3), and a fourth switching element (Q4) connected in series; andafirst flying
`
`capacitor (C1) connected between a node between (node between Q1 and Q2) the first
`
`switching element and the second switching element and a node between the third switching
`
`element and the fourth switching element (node between Q3 and Q4), and the second flying
`
`capacitor circuit (2) includes: a fifth switching element (Q5), a sixth switching element (Q6), a
`
`seventh switching element (Q7), and an eighth switching element (Q8) connected in series; and
`
`a second flying capacitor (C2) connected between a node (node between Q5 and Q6) between
`
`the fifth switching element and the sixth switching element and a node (node between Q7 and
`
`Q8) between the seventh switching element and the eighth switching element.
`
`In re claim 5, KIDERA discloses (Figs. 2A-5B) wherein the control unit performs the step-
`
`up operation or the step-down operation by using four modes including: a first mode in which
`
`the second switching element, the fourth switching element, the fifth switching element, and
`
`the seventh switching element are controlled to be in an on state and the first switching
`
`element, the third switching element, the sixth switching element, and the eighth switching
`
`element are controlled to be in an off state (Para. 0062-0080); a second mode in which the first
`
`switching element, the third switching element, the sixth switching element, and the eighth
`
`switching element are controlled to be in an on state and the second switching element, the
`
`fourth switching element, the fifth switching element, and the seventh switching element are
`
`controlled to be in an off state (Para. 0062-0080); a third mode in which the first switching
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 8
`
`element, the second switching element, the seventh switching element, and the eighth
`
`switching element are controlled to be in an on state and the third switching element, the
`
`fourth switching element, the fifth switching element, and the sixth switching element are
`
`controlled to be in an off state (Para. 0062-0080); and a fourth mode in which the third
`
`switching element, the fourth switching element, the fifth switching element, and the sixth
`
`switching element are controlled to be in an on state and the first switching element, the
`
`second switching element, the seventh switching element, and the eighth switching element
`
`are controlled to be in an off state (Para. 0062-0080).
`
`In re claim 6, KIDERA discloses (Fig. 1) wherein the control unit (9) uses the first mode,
`
`the second mode,and the third mode when a proportion between a voltage of the low voltage
`
`side DC part and a voltage of the high voltage side DC part is smaller than a predefined value
`
`and uses the first mode, the second mode, and the fourth mode when the proportion is larger
`
`than the predefined value (Para. 0081-0085).
`
`In re claim 7, KIDERA discloses (Fig. 1) wherein the control unit (9) controls a voltage of
`
`the first flying capacitor and a voltage of the second flying capacitor to be 1/4 a voltage of the
`
`high voltage side DC part (Para. 0081-0085).
`
`In re claim 8, KIDERA discloses (Fig. 1) wherein each ofthe first flying capacitor circuit
`
`and the second flying capacitor circuit includes N (N is a natural number) flying capacitors, and
`
`the control unit controls a voltage of a first flying capacitor connected innermost to be
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 9
`
`(1/(2N+2)) times a voltage of the high voltage side DC part, controls a voltage of an N-th flying
`
`capacitor connected outermost to be (N/(2N+2)) times a voltage of the high voltage side DC
`
`part, and produces (2N+1) levels of voltage between the midpointof the first flying capacitor
`
`circuit and the midpoint of the second flying capacitor circuit (Para. 0037-0060).
`
`In re claim 10, KIDERA discloses (Fig. 1) wherein the first flying capacitor circuit (1)
`
`includes: a first switching element (Q1), a second switching element (Q2), a third switching
`
`element (Q3), and a fourth switching element (Q4) connected in series; andafirst flying
`
`capacitor (C1) connected between a node between (node between Q1 and Q2) the first
`
`switching element and the second switching element and a node between the third switching
`
`element and the fourth switching element (node between Q3 and Q4), and the second flying
`
`capacitor circuit (2) includes: a fifth switching element (Q5), a sixth switching element (Q6), a
`
`seventh switching element (Q7), and an eighth switching element (Q8) connected in series; and
`
`a second flying capacitor (C2) connected between a node (node between Q5 and Q6) between
`
`the fifth switching element and the sixth switching element and a node (node between Q7 and
`
`Q8) between the seventh switching element and the eighth switching element, and wherein the
`
`control unit (9) controls the third switching element, the fourth switching element,the fifth
`
`switching element, and the sixth switching element to output a DC power from the low voltage
`
`side DC part to the high voltage side DC part in a step-up operation (Para. 0081-0085).
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 10
`
`In re claim 11, KIDERA discloses (Fig. 1) wherein the first flying capacitor circuit (1)
`
`includes: a first switching element (Q1), a second switching element (Q2), a third switching
`
`element (Q3), and a fourth switching element (Q4) connected in series; andafirst flying
`
`capacitor (C1) connected between a node between (node between Q1 and Q2) the first
`
`switching element and the second switching element and a node between the third switching
`
`element and the fourth switching element (node between Q3 and Q4), and the second flying
`
`capacitor circuit (2) includes: a fifth switching element (Q5), a sixth switching element (Q6), a
`
`seventh switching element (Q7), and an eighth switching element (Q8) connected in series; and
`
`a second flying capacitor (C2) connected between a node (node between Q5 and Q6) between
`
`the fifth switching element and the sixth switching element and a node (node between Q7 and
`
`Q8) between the seventh switching element and the eighth switching element, and wherein the
`
`control unit (9) controls the first switching element, the second switching element, the seventh
`
`switching element, and the eighth switching element to output a DC power from the high
`
`voltage side DC part to the low voltage side DC part in a step-down operation (Para. 0081-
`
`0085).
`
`Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over KIDERAetal. (U.S.
`
`Pub. No. 2017/0155321 A1) in view of FUJI (U.S. Pub. No. 2012/0319664 A1), and further in
`
`view of KIDERAetal. (U.S. Pub. No. 2021/0367532 A1, reference provided as part of the
`
`Information Disclosure Statement(“IDS”), hereinafter “KIDERA2”).
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 11
`
`In re claim 9, KIDERAfails to disclose wherein a switching element having a withstand
`
`voltage lower than a voltage of the high voltage side DC part and a voltageof the low voltage
`
`side DC part is used inaplurality of switching elements included in the first flying capacitor
`
`circuit and a plurality of switching elements included in the second flying capacitor circuit.
`
`KIDERA2 teaches (Fig. 2) a power converter (10), wherein a switching element (S3a)
`
`having a withstand voltage lower than a voltage of the high voltage side DC part and a voltage
`
`of the low voltage side DC part (Para. 0036-0038) is used in a plurality of switching elements
`
`(S3a, S3b) included in the first flying capacitor circuit (13) and a plurality of switching elements
`
`(S4a, S4b) included in the second flying capacitor circuit (14).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA wherein a switching element
`
`having a withstand voltage lower than a voltage of the high voltage side DC part and a voltage
`
`of the low voltage side DC part is used in a plurality of switching elements included in the first
`
`flying capacitor circuit and a plurality of switching elements included in the second flying
`
`capacitor circuit, as disclosed in KIDERA2 to provide a power converter in which switching
`
`elements having a low withstand voltage that are less expensive and offer higher performance
`
`can be used for the switching elements in the output stage (Para. 0007).
`
`Conclusion
`
`Any inquiry concerning this communication or earlier communications from the
`
`examiner should be directed to RAFAEL O. DE LEON DOMENECH whosetelephone number is
`
`(571)270-0517. The examiner can normally be reached on 8:00 a.m. - 5:00 p.m..
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 12
`
`Examiner interviews are available via telephone,in-person, and video conferencing
`
`using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is
`
`encouraged to use the USPTO Automated Interview Request (AIR) at
`
`http://www.uspto.gov/interviewpractice.
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
`
`supervisor, Monica Lewis can be reached on (571)272-1838. The fax phone number for the
`
`organization wherethis application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of an application may be obtained from the Patent
`
`Application Information Retrieval (PAIR) system. Status information for published applications
`
`may be obtained from either Private PAIR or Public PAIR. Status information for unpublished
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`
`/RAFAEL O DE LEON DOMENECH/
`Primary Examiner, Art Unit 2838
`
`