www.uspto.gov
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`17/636,672
`
`02/18/2022
`
`Naoaki FUJII
`
`065933-0830
`
`9070
`
`Rimon PC - Panasonic Corporation
`8300 Greensboro Dr
`Suite 500
`McLean, VA 22102
`
`DE LEON DOMENECH, RAFAEL O
`
`2838
`
`PAPER NUMBER
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`04/03/2024
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`USPTOmail @rimonlaw.com
`
`eofficeaction @appcoll.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`Office Action Summary
`
`Application No.
`17/636,672
`
`Examiner
`RAFAEL O DE LEON
`DOMENECH
`
`Applicant(s)
`FUJII, Naoaki
`
`Art Unit
`2838
`
`AIA (FITF) Status
`Yes
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`A SHORTENED STATUTORYPERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensionsof time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`1) Responsive to communication(s) filed on 03/12/2024.
`CL} A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`2a)(¥) This action is FINAL.
`2b) 0 This action is non-final.
`3) An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on__; the restriction requirement and election have been incorporatedinto this action.
`4)() Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`
`
`Disposition of Claims*
`1-3 and 5-11 is/are pending in the application.
`)
`Claim(s)
`5a) Of the aboveclaim(s)
`is/are withdrawn from consideration.
`(J Claim(s)__ is/are allowed.
`Claim(s) 1-3 and 5-11 is/are rejected.
`C) Claim(s) _ is/are objected to.
`£) Claim(s)
`are subjectto restriction and/or election requirement
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http:/Awww.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`Application Papers
`10) The specification is objected to by the Examiner.
`11)C The drawing(s) filedon__ is/are: a)E) accepted or b){) objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)C) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d)or (f).
`Certified copies:
`__c)L) None ofthe:
`b)LJ Some**
`a)L) All
`1.1) Certified copies of the priority documents have been received.
`2._) Certified copies of the priority documents have been received in Application No. |
`3.2.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`*“ See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1) (J Notice of References Cited (PTO-892)}
`
`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`
`3) [9 Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`(7) Other:
`
`4)
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20240326
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 2
`
`DETAILED ACTION
`
`This Office action is in response to the amendment filed on March 12, 2024.
`
`Notice of Pre-AlA or AIA Status
`
`The presentapplication, filed on or after March 16, 2013,
`
`is being examined underthe
`
`first inventor to file provisions of the AIA.
`
`In the event the determination of the status of the application as subjectto AIA35
`
`U.S.C. 102 and 103 (or as subjectto pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction
`
`of the statutory basis for the rejection will not be considereda new ground ofrejection if the
`
`prior art relied upon, and the rationale supporting the rejection, would be the same under
`
`either status.
`
`Information Disclosure Statement
`
`The information disclosure statement (IDS) submitted on January 10, 2024 was filed
`
`after the mailing date of the Non-final rejection on December 13, 2023. The submission is in
`
`compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure
`
`statementis being considered by the examiner.
`
`Response to Arguments
`
`Applicant's arguments have been fully considered but they are not persuasive.
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 3
`
`Applicant argues that “the claimed subject matteris directed to a DC/DC converter. In
`
`contrast, Kidera relates to multi-level inverter which convert DC voltage to AC voltage.In Kidera,
`
`flying capacitors are used in the multi-level inverter circuit section (conversion circuits 1 and 2),
`
`but a DC/DC converter correspondsto the voltage regulating circuit
`
`3” (Remarks, Page 10).
`
`Examiner respectfully disagrees, since in Fig. 1 of Kidera, the circuit portion comprising the
`
`voltage source 4, the voltage regulating circuit 3 and the conversion circuits 1 and2is
`
`considered a DC/DC converter, since the inverter portion of the powerconverter device 10 it’s
`
`the conversion circuit 5 (Para. 0055) which the DC outputs of the conversion circuits 1 and 2,
`
`therefore Kidera discloses the recited claim limitation.
`
`In responseto applicant's argument that the references fail to show certain features of
`
`the invention,it is noted that the features upon which applicantrelies (i.e., Applicant submits
`
`that Kidera has flying capacitors to increase levels of the pseudo-sine wave and to smooth the
`
`pseudo-sine wave. On the other hand, the claimed flying capacitors are used with switching
`
`elements having alow withstand voltage (e.g., MOSFETs having a withstand voltage of 150 V).
`
`By using switching elements having a low withstand voltage, the conduction loss of the
`
`switching elements can be reduced, and the efficiency of the DC-DC convertercan be increased.
`
`Using switching elements having alow withstand voltage also allows heat dissipation to be
`
`reduced and the size of componentsfor heat dissipation to be reduced. Using switching
`
`elements having a low withstand voltage also allows high-frequency operation with low
`
`switching loss so that the size of passive components can be decreased) are not recited in the
`
`rejected claim(s). Although the claims are interpreted in light of the specification, limitations
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 4
`
`from the specification are not read into the claims. See /n re Van Geuns,988 F.2d 1181, 26
`
`USPQ2d 1057 (Fed. Cir. 1993).
`
`Claim Rejections - 35 USC § 103
`
`In the event the determination of the status of the application as subjectto AIA35
`
`U.S.C. 102 and 103 (or as subjectto pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction
`
`of the statutory basis for the rejection will not be considered a new ground of rejection if the
`
`prior art relied upon, and the rationale supporting the rejection, would be the same under
`
`either status.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness
`
`rejections set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is
`not identically disclosed as set forthin section 102, if the differences between the claimed invention
`and the prior art are such that the claimed invention as a whole would have been obvious before the
`effective filing date of the claimed invention to a person having ordinary skill in the art to which the
`claimed invention pertains. Patentability shall not be negated by the manner in which the invention
`was made.
`
`The factual inquiries set forth in Grahamv. John Deere Co., 383 U.S.1, 148 USPQ 459
`
`(1966), that are applied for establishing a background for determining obviousness under 35
`
`U.S.C. 103 are summarized as follows:
`
`1. Determining the scope and contents of the prior art.
`
`2. Ascertaining the differences between the prior art and the claims at issue.
`
`3. Resolving the level of ordinary skill in the pertinent art.
`
`4. Considering objective evidence present in the application indicating obviousness or
`
`nonobviousness.
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 5
`
`Claims 1-3, 5-8 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over
`
`KIDERA etal. (U.S. Pub. No. 2017/0155321 A1) in view of FUJI (U.S. Pub. No. 2012/0319664
`
`Ai).
`
`In re claim 1, KIDERA discloses (Fig. 1) a DC-DC converter (comprising circuit elements 1-
`
`4) comprising:
`
`a first flying capacitor circuit (1) and a second flying capacitor circuit (2) connected in
`
`series with each other and in parallel to a high voltage side DC part (See Fig. 1); and wherein
`
`a midpoint (midpoint of 2) of the second flying capacitor circuit (2) is connected toa
`
`negative side terminal of the low voltage side DC part (See Fig. 1),
`
`wherein a node (node between 1 and 2) between the first flying capacitor circuit (1) and
`
`the second flying capacitor circuit (2) is connected to an intermediate potential node (100) of
`
`the high voltage side DC part,
`
`wherein the first flying capacitor circuit (1) includes: a first switching element (Q1), a
`
`second switching element (Q2), athird switching element (Q3), and a fourth switching element
`
`(Q4) connected in series; and a first flying capacitor (C1) connected betweena node between
`
`(node between Q1 and Q2) the first switching element and the second switching element and a
`
`node between the third switching element and the fourth switching element (node between Q3
`
`and Q4), and the second flying capacitor circuit (2) includes: a fifth switching element (Q5), a
`
`sixth switching element (Q6), a seventh switching element (Q7), and an eighth switching
`
`element (Q8) connected in series; and a second flying capacitor (C2) connected betweena node
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 6
`
`(node between Q5 and Q6) between the fifth switching element and the sixth switching
`
`elementand a node (node between Q7 and Q8) between the seventh switching element and
`
`the eighth switching element.
`
`KIDERAfails to disclose a reactor connected between a positive side terminal of a low
`
`voltage side DC part and a midpointof the first flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), comprising a reactor (L1) connected betweena
`
`positive side terminal of a low voltage side DC part (Vbat) and a midpoint of the capacitor
`
`circuit (L1 is connected to the midpoint between S11 and S2).
`
`It would have been obvious to one having ordinaryskill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected betweenapositive side terminal of a low voltage side DC part and a midpoint of the
`
`first flying capacitor circuit, as disclosed in FUJI to provide a DC power supply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of powerat the load (Para. 0008).
`
`In re claim 2, KIDERA discloses a DC-DC converter (Fig. 1) comprising:
`
`a first flying capacitor circuit (1) and a second flying capacitor circuit (2) connected in
`
`series with each other and in parallel to a high voltage side DC part (See Fig. 1); and
`
`whereina midpoint of the first flying capacitor circuit (midpoint of 1) is connected toa
`
`positive side terminal of the low voltage side DC part (See Fig. 1),
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 7
`
`wherein a node (node between 1 and 2) betweenthe first flying capacitor circuit (1) and
`
`the second flying capacitor circuit (2) is connected to an intermediate potential node (100) of
`
`the high voltage side DC part.
`
`wherein the first flying capacitor circuit (1) includes: a first switching element (Q1), a
`
`second switching element (Q2), athird switching element (Q3), and a fourth switching element
`
`(Q4) connected in series; and a first flying capacitor (C1) connected betweena node between
`
`(node between Q1 and Q2) the first switching element and the second switching element and a
`
`node between the third switching element and the fourth switching element (node between Q3
`
`and Q4), and the second flying capacitor circuit (2) includes: a fifth switching element (Q5), a
`
`sixth switching element (Q6), a seventh switching element (Q7), and an eighth switching
`
`element (Q8) connected in series; and a second flying capacitor (C2) connected betweena node
`
`(node between Q5 and Q6) between the fifth switching element and the sixth switching
`
`elementand a node (node between Q7 and Q8) between the seventh switching element and
`
`the eighth switching element.
`
`KIDERAfails to disclose a reactor connected betweenanegative side terminal of a low
`
`voltage side DC part and a midpoint of the second flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), a reactor (L2) connected betweena negative
`
`side terminal of a low voltage side DC part (Vbat) and a midpoint of the second flying capacitor
`
`circuit (L2 is connected to the midpoint between S3 and S4).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected betweenanegative side terminal of a low voltage side DC part and a midpoint of the
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 8
`
`second flying capacitor circuit, as disclosed in FUJI to provide a DC powersupply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of powerat the load (Para. 0008).
`
`In re claim 3, KIDERA discloses (Fig. 1) a control unit (9) that controls the first flying
`
`capacitor circuit (1) and the second flying capacitor circuit (2) to perform at least one of power
`
`transfer from the low voltage side DC part to the high voltage side DC part in a step-up
`
`operation or powertransfer from the high voltage side DC part to the low voltage side DC part
`
`in a step-down operation (Para. 0081-0085).
`
`In re claim 5, KIDERA discloses (Figs. 2A-5B) wherein the control unit performs the step-
`
`up operation or the step-down operation by using four modes including: a first mode in which
`
`the second switching element, the fourth switching element, the fifth switching element, and
`
`the seventh switching elementare controlled to be in an on state and the first switching
`
`element, the third switching element, the sixth switching element, and the eighth switching
`
`elementare controlled to bein an off state (Para. 0062-0080); a second mode in whichthe first
`
`switching element, the third switching element, the sixth switching element, and the eighth
`
`switching elementare controlled to bein an on state and the second switching element, the
`
`fourth switching element, the fifth switching element, and the seventh switching elementare
`
`controlled to be in an off state (Para. 0062-0080); a third mode in whichthe first switching
`
`element, the second switching element, the seventh switching element, and the eighth
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 9
`
`switching elementare controlled to bein an on state and the third switching element, the
`
`fourth switching element, the fifth switching element, and the sixth switching element are
`
`controlled to be in an off state (Para. 0062-0080); and a fourth mode in which the third
`
`switching element, the fourth switching element, the fifth switching element, and the sixth
`
`switching elementare controlled to bein an on state and the first switching element, the
`
`second switching element, the seventh switching element, and the eighth switching element
`
`are controlled to be in an off state (Para. 0062-0080).
`
`In re claim 6, KIDERA discloses (Fig. 1) wherein the control unit (9) uses the first mode,
`
`the second mode, and the third mode when a proportion between a voltage of the low voltage
`
`side DC part and a voltage of the high voltage side DC part is smaller than a predefined value
`
`and uses the first mode, the second mode, and the fourth mode whenthe proportion is larger
`
`than the predefined value (Para. 0081-0085).
`
`In re claim 7, KIDERA discloses (Fig. 1) wherein the control unit (9) controls a voltage of
`
`the first flying capacitor and a voltage of the second flying capacitor to be 1/4 a voltage of the
`
`high voltage side DC part (Para. 0081-0085).
`
`In re claim 8, KIDERA discloses (Fig. 1) wherein each ofthe first flying capacitor circuit
`
`and the second flying capacitor circuit includes N (N is a natural number) flying capacitors, and
`
`the control unit controls a voltage ofa first flying capacitor connected innermost to be
`
`(1/(2N+2)) times a voltage of the high voltage side DC part, controls a voltage of an N-th flying
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 10
`
`capacitor connected outermost to be (N/(2N+2)) times a voltage of the high voltage side DC
`
`part, and produces (2N+1) levels of voltage between the midpoint of the first flying capacitor
`
`circuit and the midpoint of the second flying capacitor circuit (Para. 0037-0060).
`
`In re claim 10, KIDERA discloses (Fig. 1) a DC-DC converter (comprising circuit elements
`
`1-4) comprising:
`
`a first flying capacitor circuit (1) and a second flying capacitor circuit (2) connected in
`
`series with each other and in parallel to a high voltage side DC part (See Fig. 1);
`
`a control unit (9) that controls the first flying capacitor circuit (1) and the second flying
`
`capacitor circuit (2) to perform at least one of power transfer from the low voltage side DC part
`
`to the high voltage side DC part in a step-up operation (Para. 0081-0085),
`
`whereina midpoint (midpoint of 2) of the second flying capacitor circuit (2) is connected
`
`to a negative side terminal of the low voltage side DC part (See Fig. 1),
`
`wherein a node (node between 1 and 2) betweenthe first flying capacitor circuit (1) and
`
`the second flying capacitor circuit (2) is connected to an intermediate potential node (100) of
`
`the high voltage side DC part,
`
`wherein the first flying capacitor circuit (1) includes:
`
`a first diode (D1), a second diode (D2), a third switching element (Q3), and a fourth
`
`switching element (Q4) connected in series; and
`
`a first flying capacitor (C1) connected betweena node between (node between Q1and
`
`Q2) the first diode and the second diode and a node between the third switching element and
`
`the fourth switching element (node between Q3 and Q4),
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 11
`
`wherein the second flying capacitor circuit (2) includes:
`
`a fifth switching element (Q5), a sixth switching element (Q6), a seventh diode (D7), and
`
`an eighth diode (D8) connectedin series; and
`
`a second flying capacitor (C2) connected betweena node (node between Q5 and Q6)
`
`between the fifth switching element and the sixth switching element and a node (node
`
`between Q7 and Q8) between the seventh diode and the eighth diode, and
`
`wherein the control unit (9) controls the third switching element, the fourth switching
`
`element, the fifth switching element, and the sixth switching element to output a DC power
`
`from the low voltage side DC part to the high voltage side DC part in a step-up operation (Para.
`
`0081-0085).
`
`KIDERAfails to disclose a reactor connected between a positive side terminal of a low
`
`voltage side DC part and a midpoint of the first flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), comprising a reactor (L1) connected betweena
`
`positive side terminal of a low voltage side DC part (Vbat) and a midpoint of the capacitor
`
`circuit (L1 is connected to the midpoint between S11 and S2).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected betweena positive side terminal of a low voltage side DC part and a midpoint of the
`
`first flying capacitor circuit, as disclosed in FUJI to provide a DC power supply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of powerat the load (Para. 0008).
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 12
`
`In re claim 11, KIDERA discloses (Fig. 1) a DC-DC converter (comprising circuit elements
`
`1-4) comprising:
`
`a first flying capacitor circuit (1) anda second flying capacitor circuit (2) connected in
`
`series with each other and in parallel to a high voltage side DC part (See Fig. 1);
`
`a control unit (9) that controls the first flying capacitor circuit (1) and the second flying
`
`capacitor circuit (2) to perform power transfer from the high voltage side DC part to the low
`
`voltage side DC part in a step-down operation (Para. 0081-0085),
`
`whereina midpoint (midpoint of 2) of the second flying capacitor circuit (2) is connected
`
`to a negative side terminal of the low voltage side DC part (See Fig. 1),
`
`wherein a node (node between 1 and 2) betweenthe first flying capacitor circuit (1) and
`
`the second flying capacitor circuit (2) is connected to an intermediate potential node (100) of
`
`the high voltage side DC part,
`
`wherein the first flying capacitor circuit (1) includes:
`
`a first switching element (Q1), a second switching element (Q2), a third diode (D3), and
`
`a fourth diode (D4) connected in series; and
`
`a first flying capacitor (C1) connected betweenanode between (node between Qland
`
`Q2) the first switching element and the second switching element and a node betweenthe
`
`third diode and the fourth diode (node between Q3 and Q4),
`
`wherein the second flying capacitor circuit (2) includes:
`
`a fifth diode (D5), a sixth diode (D6), a seventh switching element (Q7), and an eighth
`
`switching element (Q8) connected in series; and
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 13
`
`a second flying capacitor (C2) connected betweena node (node between Q5 and Q6)
`
`between the fifth diode and the sixth diode and a node (node between Q7 and Q8) between
`
`the seventh switching elementand the eighth switching element, and
`
`wherein the control unit (9) controls the first switching element, the second switching
`
`element, the seventh switching element, and the eighth switching elementto output a DC
`
`power from the high voltage side DC part to the low voltage side DC part in a step-down
`
`operation (Para. 0081-0085).
`
`KIDERAfails to disclose a reactor connected between a positive side terminal of a low
`
`voltage side DC part and a midpointof the first flying capacitor circuit.
`
`FUJI teaches a converter circuit (Fig. 3), comprising a reactor (L1) connected betweena
`
`positive side terminal of a low voltage side DC part (Vbat) and a midpoint of the capacitor
`
`circuit (L1 is connected to the midpoint between S11 and S2).
`
`It would have been obvious to one having ordinary skill in the art before the effective
`
`filing date of the claimed invention to modify the device of KIDERA to include a reactor
`
`connected betweena positive side terminal of alow voltage side DC part and a midpoint of the
`
`first flying capacitor circuit, as disclosed in FUJI to provide a DC power supply system of a
`
`bidirectional step-up type that supplies balanced voltages of series-connected DC output
`
`capacitors despite dispersion in component characteristics and operating signals, or imbalance
`
`of powerat the load (Para. 0008).
`
`Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over KIDERA etal. (U.S.
`
`Pub. No. 2017/0155321 A1) in view of FUJI (U.S. Pub. No. 2012/0319664 A1), and further in
`
`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
`
`Page 14
`
`view of KIDERA et al. (U.S. Pub. No. 2021/0367532 A1, reference provided as part of the
`
`Information Disclosure Statement (“IDS”), hereinafter “KIDERA2”).
`
`In re claim 9, KIDERA fails to disclose wherein a switching element having a withstand
`
`voltage lower than a voltage of the high voltage side DC part and a voltage of the low voltage
`
`side DC part is used ina plurality of switching elements included in the first flying capacitor
`
`circuit anda plurality of switching elements included in the second flying capacitor circuit.
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`KIDERA2 teaches (Fig. 2) a powerconverter (10), whereina switching element (S3a)
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`having a withstand voltage lower than a voltage of the high voltage side DC part andavoltage
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`of the low voltage side DC part (Para. 0036-0038)
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`is usedin a plurality of switching elements
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`(S3a, S3b) included in the first flying capacitor circuit (13) and a plurality of switching elements
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`(S4a, S4b) included in the second flying capacitor circuit (14).
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`It would have been obvious to one having ordinary skill in the art before the effective
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`filing date of the claimed invention to modify the device of KIDERA wherein a switching element
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`having a withstand voltage lower than a voltage of the high voltage side DC part andavoltage
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`of the low voltage side DC part is used in a plurality of switching elementsincluded in the first
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`flying capacitor circuit anda plurality of switching elements included in the second flying
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`capacitor circuit, as disclosed in KIDERA2 to provide a power converter in which switching
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`elements having a low withstand voltage that are less expensive and offer higher performance
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`can be used for the switching elementsin the output stage (Para. 0007).
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`

`

`Application/Control Number: 17/636,672
`Art Unit: 2838
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`Page 15
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`Conclusion
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`THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as
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`set forth in 37 CFR 1.136(a).
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`A shortened statutory period for reply to this final action is setto expire THREE MONTHS
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`from the mailing date of this action.
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`In the eventa first reply is filed within TWO MONTHS of
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`the mailing date of this final action and the advisory action is not mailed until afterthe end of
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`the THREE-MONTHshortened statutory period, thenthe shortened statutory period will expire
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`on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a)
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`will be calculated from the mailing date of the advisory action.
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`In no event, however,will the
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`statutory period for reply expire later than SIX MONTHS from the mailing date of this final
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`action.
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`Any inquiry concerning this communication or earlier communications from the
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`examiner should be directed to RAFAEL O. DE LEON DOMENECH whose telephone number is
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`(571)270-0517. The examiner can normally be reachedon 8:00 a.m. - 5:00 p.m..
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`Examiner interviewsare available via telephone, in-person, and video conferencing
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`using a USPTO supplied web-based collaboration tool. To schedule an interview,applicant is
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`encouraged to use the USPTO Automated Interview Request (AIR) at
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`http://www.uspto.gov/interviewpractice.
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`If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
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`supervisor, Monica Lewis can be reached on (571)272-1838. The fax phone numberfor the
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`organization wherethis application or proceeding is assigned is 571-273-8300.
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`

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`Application/Control Number: 17/636,672
`Art Unit: 2838
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`Page 16
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`Information regarding the status of an application may be obtained from the Patent
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`Application Information Retrieval (PAIR) system. Status information for published applications
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`may be obtained from either Private PAIR or Public PAIR. Status information for unpublished
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`applications is available through Private PAIR only. For more information about the PAIR
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`/RAFAEL O DE LEON DOMENECH/
`Primary Examiner, Art Unit 2838
`
`