ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
`
`CROSS REFERENCE TO RELATED APPLICATIONS
`
`This application is a U.S. continuation application of PCT International
`
`Patent Application Number PCT/JP2019/022788 filed on June 7, 2019, claiming
`
`the benefit of priority of U.S. Provisional Patent Application Numbers
`
`62/683286 filed on June 11, 2018 and 62/697605 filed on July 13, 2018, the
`
`entire contents of which are hereby incorporated by reference.
`
`10
`
`BACKGROUND
`
`1. Technical Field
`
`The present disclosure relates to an encoder, a decoder, an encoding
`
`method, and a decoding method.
`
`15
`
`2. Description of the Related Art
`
`Conventionally, H.265 has been known as a standard for encoding
`
`Moving pictures. H.265 is also referred to as High-Efficiency Video Coding
`
`(HEVC)
`
`(4.265 CSO/MEC 23008-2 HEVC)/HEVC (High Efficiency Video
`
`Coding)) (Non-patent Literature (NPL) 1).
`
`20
`
`SUMMARY
`
`An encoder according to one aspect of the present disclosure includes
`
`circuitry and memory. Using the memory,the circuitry: performs a transform
`
`process of G) applying a first
`
`transform to a prediction residual signal
`
`25
`
`indicating a difference between a current block to be encoded and a prediction
`
`image of the current block and Gi) further applying a second transform to a
`
`transform result of the first transform; and in the second transform, selects one
`
`1
`
`
`
`CROSS REFERENCE TO RELATED APPLICATIONS
`
`This application is a U.S. continuation application of PCT International
`
`Patent Application Number PCT/JP2019/022788 filed on June 7, 2019, claiming
`
`the benefit of priority of U.S. Provisional Patent Application Numbers
`
`62/683286 filed on June 11, 2018 and 62/697605 filed on July 13, 2018, the
`
`entire contents of which are hereby incorporated by reference.
`
`10
`
`BACKGROUND
`
`1. Technical Field
`
`The present disclosure relates to an encoder, a decoder, an encoding
`
`method, and a decoding method.
`
`15
`
`2. Description of the Related Art
`
`Conventionally, H.265 has been known as a standard for encoding
`
`Moving pictures. H.265 is also referred to as High-Efficiency Video Coding
`
`(HEVC)
`
`(4.265 CSO/MEC 23008-2 HEVC)/HEVC (High Efficiency Video
`
`Coding)) (Non-patent Literature (NPL) 1).
`
`20
`
`SUMMARY
`
`An encoder according to one aspect of the present disclosure includes
`
`circuitry and memory. Using the memory,the circuitry: performs a transform
`
`process of G) applying a first
`
`transform to a prediction residual signal
`
`25
`
`indicating a difference between a current block to be encoded and a prediction
`
`image of the current block and Gi) further applying a second transform to a
`
`transform result of the first transform; and in the second transform, selects one
`
`1
`
`
`
`transform basis G) from a first group of candidates when a size of the current
`
`block is a first block size and Gi) from a second group of candidates when the
`
`size of the current block is a second block size different from the first block size,
`
`the first group including one or more candidates for a transform basis, the
`
`second group being different from thefirst group.
`
`It should be noted that these general or specific aspects of the present
`
`disclosure may be implemented as a system, a device, a method, an integrated
`
`circuit, a computer program, a computer-readable non-volatile medium such as
`
`a CD-ROM,or anyselective combination thereof.
`
`10
`
`BRIEF DESCRIPTION OF DRAWINGS
`
`These and other objects, advantages and features of the disclosure will
`
`become apparent from the following description thereof taken in conjunction
`
`with the accompanying drawings that illustrate a specific embodiment of the
`
`15
`
`present disclosure.
`
`FIG. 1 is a block diagram illustrating a functional configuration of an
`
`encoder according to an embodiment;
`
`FIG. 2 is a flow chart indicating one example of an overall encoding
`
`process performed by the encoder:
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`20
`
`FIG. 3 is a conceptual diagram illustrating one example of block
`
`splitting;
`
`FIG. 4A is a conceptual diagram illustrating one example of a slice
`
`configuration;
`
`FIG. 4B is a conceptual diagram illustrating one example of a tile
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`25
`
`configuration;
`
`FIG. 5A is a chart indicating transform basis functions for various
`
`transform types;
`
`
`
`FIG. 5B is a conceptual diagram illustrating example spatially varying
`
`transforms (SVT);
`
`FIG. 6A is a conceptual diagram illustrating one example of a filter
`
`shape used in an adaptive loop filter (ALF);
`
`FIG. 6B is a conceptual diagram illustrating another example of a filter
`
`shape used in an ALF;
`
`FIG. 6C is a conceptual diagram illustrating another example of a filter
`
`shape used in an ALF;
`
`FIG.
`
`7 is a block diagram indicating one example of a specific
`
`10
`
`configuration of a loop filter which functions as a deblocking filter (DBF);
`
`FIG. 8 is a conceptual diagram indicating an example of a deblocking
`
`filter having a symmetrical filtering characteristic with respect to a block
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`boundary;
`
`FIG. 9 is a conceptual diagram for illustrating a block boundary on which
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`15
`
`a deblocking filter process is performed;
`
`FIG. 10 is a conceptual diagram indicating examples of Bs values;
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`FIG. 11 is a flow chart illustrating one example of a process performed by
`
`a prediction processor of the encoder;
`
`FIG. 12 is a flow chart
`
`illustrating another example of a process
`
`20
`
`performed by the prediction processorof the encoder;
`
`FIG. 13 is a flow chart
`
`illustrating another example of a process
`
`performed by the prediction processor of the encoder;
`
`FIG. 14 is a conceptual diagram illustrating sixty-seven intra prediction
`
`modes used in intra prediction in an embodiment;
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`25
`
`FIG. 15 is a flow chart illustrating an example basic processing flow of
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`inter prediction;
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`
`
`FIG. 16 is a flow chart illustrating one example of derivation of motion
`
`vectors;
`
`FIG. 17 is a flow chart illustrating another example of derivation of
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`motion vectors;
`
`FIG. 18 is a flow chart illustrating another example of derivation of
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`motion vectors;
`
`FIG. 19 is a flow chart illustrating an example of inter prediction in
`
`normal inter mode;
`
`FIG. 20 is a flow chart illustrating an example of inter prediction in
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`10
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`merge mode;
`
`FIG. 21 is a conceptual diagram for illustrating one example of a motion
`
`vector derivation process in merge mode;
`
`FIG. 22 is a flow chart illustrating one example of frame rate up
`
`conversion (FRUC)process;
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`15
`
`FIG. 23 is a conceptual diagram for illustrating one example of pattern
`
`matching (bilateral matching) between two blocks along a motion trajectory;
`
`FIG. 24 is a conceptual diagram for illustrating one example of pattern
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`matching (template matching) between a template in a current picture and a
`
`block in a reference picture;
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`20
`
`FIG. 25A is a conceptual diagram for illustrating one example of deriving
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`a motion vector of each sub-block based on motion vectors of a plurality of
`
`neighboring blocks;
`
`FIG. 25B is a conceptual diagram for illustrating one example of deriving
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`a motion vector of each sub-block in affine mode in which three control points
`
`25
`
`are used;
`
`FIG. 26A is a conceptual diagram for illustrating an affine merge mode;
`
`
`
`FIG. 26B is a conceptual diagram for illustrating an affine merge mode
`
`in which two control points are used;
`
`FIG. 26C is a conceptual diagram for illustrating an affine merge mode
`
`in which three control points are used;
`
`FIG. 27 is a flow chart illustrating one example of a process in affine
`
`merge mode;
`
`FIG. 28A is a conceptual diagram for illustrating an affine inter mode in
`
`which two control points are used;
`
`FIG. 28B is a conceptual diagram for illustrating an affine inter mode in
`
`10
`
`which three control points are used;
`
`FIG. 29 is a flow chart illustrating one example of a process in affine
`
`inter mode;
`
`FIG. 30A is a conceptual diagram for illustrating an affine inter mode in
`
`which a current block has three control points and a neighboring block has two
`
`15
`
`control points;
`
`FIG. 30B is a conceptual diagram for illustrating an affine inter mode in
`
`which a current block has two control points and a neighboring block has three
`
`control points;
`
`FIG. 31A is a flow chart illustrating a merge mode process including
`
`20
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`decoder motion vector refinement (DMVR);
`
`FIG. 31B is a conceptual diagram for illustrating one example of a
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`DMVR process;
`
`FIG. 32 is a flow chart illustrating one example of generation of a
`
`prediction image;
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`25
`
`FIG. 33 is a flow chart illustrating another example of generation of a
`
`prediction image;
`
`
`
`FIG. 34 is a flow chart illustrating another example of generation of a
`
`prediction image;
`
`FIG. 35 is a flow chart illustrating one example of a prediction image
`
`correction process performed by an overlapped block motion compensation
`
`(OBMC)process;
`
`FIG. 36 is a conceptual diagram for ilustrating one example of a
`
`prediction image correction process performed by an OBMCprocess;
`
`FIG. 37 is a conceptual diagram for illustrating generation of two
`
`triangular prediction images;
`
`10
`
`FIG. 38 is a conceptual diagram for illustrating a model assuming
`
`uniform linear motion;
`
`FIG. 39 is a conceptual diagram for illustrating one example of a
`
`prediction image generation method using a luminance correction process
`
`performedby a local illumination compensation (LIC) process;
`
`15
`
`FIG. 40 is a block diagram illustrating a mounting example of the
`
`encoder;
`
`FIG. 41 is a block diagram illustrating a functional configuration of a
`
`decoder according to an embodiment;
`
`FIG. 42 is a flow chart illustrating one example of an overall decoding
`
`20
`
`process performed by the decoder;
`
`FIG. 43 is a flow chart illustrating one example of a process performed by
`
`a prediction processor of the decoder;
`
`FIG. 44 is a flow chart
`
`illustrating another example of a process
`
`performed by the prediction processor of the decoder;
`
`25
`
`FIG. 45 is a flow chart illustrating an example of inter prediction in
`
`normal inter modein the decoder;
`
`FIG. 46 is a block diagram illustrating a mounting example of the
`
`6
`
`
`
`decoder;
`
`FIG. 47 is a diagram for explaining a second transform according to the
`
`embodiment;
`
`FIG. 48 is a flow chart
`
`illustrating a procedure performed by a
`
`transformer in the encoder according to the embodiment;
`
`FIG. 49A is a chart illustrating examples of an amount of processing
`
`necessary for a first transform performed on an entire CTU according to the
`
`embodiment;
`
`FIG. 49B is a chart illustrating examples of an amount of processing
`
`10
`
`necessary for a second transform performed on an entire CTU according to the
`
`embodiment;
`
`FIG. 50 is a chart
`
`illustrating a first example according to the
`
`embodiment:
`
`FIG. 51 is a chart illustrating a second example according to the
`
`15
`
`embodiment;
`
`FIG. 52 is a chart
`
`illustrating a third example according to the
`
`embodiment;
`
`FIG. 53 is a chart illustrating a fourth example according to the
`
`embodiment;
`
`20
`
`FIG. 54 is a flow chart illustrating an example of operation performed
`
`by the encoder according to the embodiment;
`
`FIG. 55 is a flow chart illustrating an example of operation performed
`
`by the decoderaccording to the embodiment;
`
`FIG. 56 is a block diagram illustrating an overall configuration of a
`
`25
`
`content providing system for implementing a content distribution service;
`
`FIG. 57 is a conceptual diagram illustrating one example of an encoding
`
`structure in scalable encoding;
`
`
`
`FIG. 58 is a conceptual diagram illustrating one example of an encoding
`
`structure in scalable encoding;
`
`FIG. 59 is a conceptual diagram illustrating an example of a display
`
`screen of a web page;
`
`FIG. 60 is a conceptual diagram illustrating an example of a display
`
`screen of a web page;
`
`FIG. 611s a block diagram illustrating one example of a smartphone; and
`
`FIG. 62 is a block diagram illustrating an example of a configuration of a
`
`smartphone.
`
`10
`
`DETAILED DESCRIPTION OF THE EMBODIMENTS
`
`[Underlying Knowledge Forming Basis of the Present Disclosure]
`
`An encoder, for instance, performs a second transform such as an
`
`orthogonal transform on transform coefficients obtained by applying a first
`
`15
`
`transform to a prediction residual signal in some cases.
`
`In such a case, the
`
`encoder may apply the second transform of plural block sizes to the transform
`
`coefficients thus obtained.
`
`In view of this, an encoder according to one aspect of the present
`
`disclosure includes circuitry and memory. Using the memory, the circuitry:
`
`20
`
`performs, on a current block to be processed, a transform process of applying a
`
`second transform to transform coefficients obtained by applying a first
`
`transform to a prediction residual signal, the current block being included in a
`
`plurality of blocks having a plurality of sizes, the second transform having a
`
`common block size for the plurality of blocks; and selects,
`
`in the second
`
`25
`
`transform, one transform basis from a group of candidates which include one or
`
`more candidates for a transform basis and are different according to a size of
`
`the current block.
`
`
`
`This enables the encoder to more appropriately select a candidate for a
`
`transform basis than a conventional encoder and apply the selected transform
`
`basis candidate to a current block to be processed when applying the second
`
`transform having a common block size to the current block. Accordingly, the
`
`encoder is more capable of reducing the load of encoding in the second
`
`transform than the conventional encoder.
`
`In the encoder according to one aspect of the present disclosure, a
`
`transform basis for the second transform is, for example, a 4*4 square.
`
`This enables the encoderto select a transform basis having the smallest
`
`10
`
`size when applying the second transform having a common block size to the
`
`current block.
`
`In the encoder according to one aspect of the present disclosure, a
`
`transform basis for the second transform is, for example, an 8x8 square.
`
`This enables the encoder
`
`to select a transform basis having an
`
`15
`
`appropriate size when applying the second transform having a common block
`
`size to the current block.
`
`The encoder according to one aspect of the present disclosure, for
`
`example, assigns a common candidate for the transform basis to the group of
`
`candidates for the current block of at least two sizes of the plurality of sizes in
`
`20
`
`the second transform.
`
`This enables the encoder to reduce more the amount of processing than
`
`a conventional encoder. For example, the encoder is capable of reducing the
`
`amount of processing by assigning a commonbasis to a 1616 current block and
`
`a 32x32 current block to perform the second transform.
`
`25
`
`When the size of the current block is smaller than or equal to a
`
`predetermined block size, the encoder according to one aspect of the present
`
`disclosure determines that the second transform is not to be applied to the
`
`9
`
`
`
`transform coefficients. When the size of the current block is larger than the
`
`predetermined block size, the encoder determines that the second transform is
`
`to be applied to the transform coefficients.
`
`This enables the encoder to reduce more the amount of processing in a
`
`transform process than a conventional encoder by not performing the second
`
`transform when a currentblock to be processed has a size such that the amount
`
`of processing in the second transform increases.
`
`In the encoder according to one aspect of the present disclosure, the
`
`predetermined block size is, for example, a 4x4 square.
`
`10
`
`This enables the encoder to reduce more the amount of processing in a
`
`transform process than a conventional encoder by not performing the second
`
`transform when a current block on which a transform is to be performed has
`
`the size of 4x4 such that the amount of processing in the second transform
`
`increases.
`
`15
`
`In the encoder according to one aspect of the present disclosure, the
`
`predetermined block size is, for example, a 4<8 or 8x4 rectangle.
`
`This enables the encoder to reduce more the amount of processing in a
`
`transform process than a conventional encoder by not performing the second
`
`transform when the current block has the size of 4x8 or 8x4 such that the
`
`20
`
`amount of processing in the second transform increases.
`
`In the encoder according to one aspect of the present disclosure, the
`
`predetermined blocksize is, for example, equal to the smallest block size among
`
`one or more block sizes selectable in the second transform.
`
`This enables the encoder to reduce more the amount of processing in a
`
`25
`
`transform process than a conventional encoder by not performing the second
`
`transform when the current block has a size such that the amountof processing
`
`in the second transform is the largest among a plurality of sizes selectable by
`
`10
`
`
`
`the encoder.
`
`A decoder according to one aspect of the present disclosure includes
`
`circuitry and memory. Using the memory, the circuitry: performs, on a current
`
`block to be processed, an inverse transform process of applying a first
`
`transform to transform coefficients obtained by applying a second transform to
`
`a transform coefficient signal, the current block being included in a plurality of
`
`blocks having a plurality of sizes, the second transform having a common block
`
`size for the plurality of blocks; and selects, in the second transform, one
`
`transform basis from a group of candidates which include one or more
`
`10
`
`candidates for a transform basis and are different according to a size of the
`
`current block.
`
`This enables the decoder to more appropriately select a candidate for a
`
`transform basis than a conventional decoder and apply the selected transform
`
`basis candidate to a current block to be processed when applying the second
`
`15
`
`transform having a common block size to the current block. Accordingly, the
`
`decoder is more capable of reducing the load of encoding in the second
`
`transform than the conventional decoder.
`
`In the decoder according to one aspect of the present disclosure, a
`
`transform basis for the second transform is, for example, a 4x4 square.
`
`20
`
`This enables the decoderto select a transform basis having the smallest
`
`size when applying the second transform having a common block size to the
`
`current block.
`
`In the decoder according to one aspect of the present disclosure, a
`
`transform basis for the second transform is, for example, an 88 square.
`
`25
`
`This enables the decoder
`
`to select a transform basis having an
`
`appropriate size when applying the second transform having a common block
`
`size to the current block.
`
`11
`
`
`
`The decoder according to one aspect of the present disclosure assigns a
`
`common candidate for the transform basis to the group of candidates for the
`
`current block of at least two sizes of the plurality of sizes in the second
`
`transform.
`
`This enables the decoder to reduce more the amountof processing than
`
`a conventional decoder. For example, the decoder is capable of reducing the
`
`amount of processing by assigning a commonbasis to a 1616 current block and
`
`a 32x32 current block to perform the second transform.
`
`When the size of the current block is smaller than or equal to a
`
`10
`
`predetermined block size, the decoder according to one aspect of the present
`
`disclosure determines that the second transform is not to be applied to the
`
`transform coefficients. When the size of the current block is larger than the
`
`predetermined block size, the decoder determines that the second transform is
`
`to be applied to the transform coefficients.
`
`15
`
`This enables the decoder to reduce more the amount of processing in a
`
`transform process than a conventional decoder by not performing the second
`
`transform when a current block to be processed hasa size such that the amount
`
`of processing in the second transform increases.
`
`In the decoder according to one aspect of the present disclosure, the
`
`20
`
`predetermined block size is, for example, a 4x4 square.
`
`This enables the decoder to reduce more the amount of processing in a
`
`transform process than a conventional decoder by not performing the second
`
`transform when a current block on which a transform is to be performed has
`
`the size of 4x4 such that the amount of processing in the second transform
`
`25
`
`increases.
`
`In the decoder according to one aspect of the present disclosure, the
`
`predetermined block size is, for example, a 4x8 or 84 rectangle.
`
`12
`
`
`
`This enables the decoder to reduce more the amount of processing in a
`
`transform process than a conventional decoder by not performing the second
`
`transform when the current block has the size of 4x8 or 8x4 such that the
`
`amount of processing in the second transform increases.
`
`In the decoder according to one aspect of the present disclosure, the
`
`predetermined block size is, for example, equal to the smallest block size among
`
`one or more block sizes selectable in the second transform.
`
`This enables the decoder to reduce more the amount of processing in a
`
`transform process than a conventional decoder by not performing the second
`
`10
`
`transform when the current block has a size such that the amountof processing
`
`in the second transform is the largest among a plurality of sizes selectable by
`
`the decoder.
`
`An encoding method according to one aspect of the present disclosure
`
`includes: performing, on a current block to be processed, a transform process of
`
`15
`
`applying a second transform to transform coefficients obtained by applying a
`
`first transform to a prediction residual signal, the current block being included
`
`in a plurality of blocks having a plurality of sizes, the second transform having
`
`a common block size for the plurality of blocks; and selecting, in the second
`
`transform, one transform basis from a group of candidates which include one or
`
`20
`
`more candidates for a transform basis and are different according to a size of
`
`the current block.
`
`Thus, with the encoding method, the same advantageouseffects can be
`
`obtained as those obtained with the encoder.
`
`A decoding method according to one aspect of the present disclosure
`
`25
`
`includes: performing, on a current block to be processed, an inverse transform
`
`process of applying a first transform to transform coefficients obtained by
`
`applying a second transform to a transform coefficient signal, the current block
`
`13
`
`
`
`being included in a plurality of blocks having a plurality of sizes, the second
`
`transform having a commonblock size for the plurality of blocks; and selecting,
`
`in the second transform, one transform basis from a group of candidates which
`
`include one or more candidates for a transform basis and are different
`
`according to a size of the current block.
`
`Thus, with the decoding method, the same advantageous effects can be
`
`obtained as those obtained with the decoder.
`
`An encoder according to one aspect of the present disclosure may
`
`include, for example, a partitioner, an intra predictor, an inter predictor, a loop
`
`10
`
`filter, a transformer, a quantizer, and an entropy encoder.
`
`The partitioner may partition a picture into a plurality of blocks. The
`
`intra predictor may perform intra prediction on a block included in the
`
`plurality of blocks. The inter predictor may perform inter prediction on the
`
`block. The transformer may transform prediction errors between an original
`
`15
`
`image and a prediction image obtained through the intra prediction or the inter
`
`prediction to generate transform coefficients. The quantizer may quantize the
`
`transform coefficients to generate quantized coefficients. The entropy encoder
`
`may encode the quantized coefficients to generate an encoded bitstream. The
`
`loop filter may apply a filter to a reconstructed imageof the block.
`
`20
`
`Moreover, the encoder may encode a video including pictures.
`
`The transformer may perform, on a current block to be processed, a
`
`transform process of applying a second transform to transform coefficients
`
`obtained by applying a first transform to a prediction residual signal. The
`
`current block may be included in a plurality of blocks having a plurality of sizes,
`
`25
`
`and the second transform may have a common block size for the plurality of
`
`blocks.
`
`The transformer may then select,
`
`in the second transform, one
`
`transform basis from a group of candidates which include one or more
`
`14
`
`
`
`candidates for a transform basis and are different according to a size of the
`
`current block.
`
`A decoder according to one aspect of the present disclosure mayinclude,
`
`for example, an entropy decoder, an inverse quantizer, an inverse transformer,
`
`an intra predictor, an inter predictor, and a loop filter.
`
`The entropy decoder may decode, from an encoded bitstream, quantized
`
`coefficients of a block in a picture.
`
`The inverse quantizer may inverse
`
`quantize the quantized coefficients to obtain transform coefficients.
`
`The
`
`inverse transformer may inverse transform the transform coefficients to obtain
`
`10
`
`prediction errors. The intra predictor may perform intra prediction on the
`
`block. The inter predictor may perform inter prediction on the block. The
`
`loop filter may apply a filter to a reconstructed image generated using a
`
`prediction image obtained through the intra prediction or the inter prediction
`
`and the prediction errors.
`
`15
`
`Moreover, the decoder may decode a video including pictures.
`
`A decoding method according to one aspect of the present disclosure
`
`includes: performing, on a current block to be processed, an inverse transform
`
`process of applying a first transform to transform coefficients obtained by
`
`applying a second transform to a transform coefficient signal, the current block
`
`20
`
`being included in a plurality of blocks having a plurality of sizes, the second
`
`transform having a commonblock size for the plurality of blocks; and selecting,
`
`in the second transform, one transform basis from a group of candidates which
`
`include one or more candidates for a transform basis and are different
`
`according to a size of the current block. The inverse transformer may perform,
`
`25
`
`on a current block to be processed, an inverse transform process of applying a
`
`first
`
`transform to transform coefficients obtained by applying a second
`
`transform to a transform coefficient signal. The current block may be included
`
`15
`
`
`
`in a plurality of blocks having a plurality of sizes, and the second transform
`
`may have a common block size for the plurality of blocks. The inverse
`
`transformer may thenselect, in the second transform, one transform basis from
`
`a group of candidates which include one or more candidates for a transform
`
`basis and are different according to a size of the current block.
`
`General or specific aspects of the present disclosure may be realized as a
`
`system, device, method, integrated circuit, computer program, non-transitory
`
`computer-readable medium such as a CD-ROM, or any given combination
`
`thereof.
`
`10
`
`Hereinafter, embodiments will be described with reference to the
`
`drawings. Note that the embodiments described below each show a general or
`
`specific example. The numerical values, shapes, materials, components, the
`
`arrangement and connection of the components, steps, the relation and order of
`
`the steps, etc., indicated in the following embodiments are mere examples, and
`
`15
`
`are not intended to limit the scope of the claims.
`
`Embodiments of an encoder and a decoder will be described below. The
`
`embodiments are examples of an encoder and a decoder to which the processes
`
`and/or configurations presented in the description of aspects of the present
`
`disclosure are applicable. The processes and/or configurations can also be
`
`20
`
`implemented in an encoder and a decoderdifferent from those according to the
`
`embodiments. For example, regarding the processes and/or configurations as
`
`applied to the embodiments, any of the following may be implemented:
`
`(1) Any of the components of the encoderor the decoder according to the
`
`embodiments presented in the description of aspects of the present disclosure
`
`25
`
`may be substituted or combined with another component presented anywhere
`
`in the description of aspects of the present disclosure.
`
`16
`
`
`
`(2)
`
`In the encoder or
`
`the decoder according to the embodiments,
`
`discretionary changes may be madeto functions or processes performed by one
`
`or more components of
`
`the encoder or
`
`the decoder,
`
`such as addition,
`
`substitution, removal, etc., of the functions or processes. For example, any
`
`function or process may be substituted or combined with another function or
`
`process presented anywhere in the description of aspects of the present
`
`disclosure.
`
`(3) In methods implemented by the encoder or the decoder according to
`
`the embodiments, discretionary changes may be made such as addition,
`
`10
`
`substitution, and removal of one or more of the processes included in the
`
`method. For example, any process in the method may be substituted or
`
`combined with another process presented anywhere in the description of
`
`aspects of the present disclosure.
`
`(4) One or more components included in the encoder or the decoder
`
`15
`
`according to embodiments may be combined with a component presented
`
`anywhere in the description of aspects of the present disclosure, may be
`
`combined with a component
`
`including one or more functions presented
`
`anywherein the description of aspects of the present disclosure, and may be
`
`combined with a component
`
`that
`
`implements one or more processes
`
`20
`
`implemented by a component presented in the description of aspects of the
`
`present disclosure.
`
`(5) A component including one or more functions of the encoder or the
`
`decoder according to the embodiments, or a component that implements one or
`
`more processes of the encoder or the decoder according to the embodiments,
`
`25
`
`may be combinedor substituted with a component presented anywhere in the
`
`description of aspects of the present disclosure, with a component including one
`
`or more functions presented anywhere in the description of aspects of the
`
`17
`
`
`
`present disclosure, or with a component that implements one or more processes
`
`presented anywherein the description of aspects of the present disclosure.
`
`(6) In methods implemented by the encoder or the decoder according to
`
`the embodiments, any of the processes included in the method may be
`
`substituted or combined with a process presented anywhere in the description
`
`of aspects of the present disclosure or with any corresponding or equivalent
`
`process.
`
`(7) One or more processes included in methods implemented by the
`
`encoder or the decoder according to the embodiments may be combined with a
`
`10
`
`process presented anywhere in the description of aspects of the present
`
`disclosure.
`
`(8) The implementation of the processes and/or configurations presented
`
`in the description of aspects of the present disclosure is not lhmited to the
`
`encoder or the decoder according to the embodiments.
`
`For example,
`
`the
`
`15
`
`processes and/or configurations may be implemented in a device used for a
`
`purpose different from the moving picture encoder or the moving picture
`
`decoder disclosed in the embodiments.
`
`EMBODIMENT1
`
`[Encoder]
`
`20
`
`First, an encoder according to an embodiment will be described. FIG. 1 is
`
`a block diagram illustrating a functional configuration of encoder 100 according
`
`to the embodiment. Encoder 100 is a video encoder which encodes a video in
`
`units of a block.
`
`As illustrated in FIG. 1, encoder 100 is an apparatus which encodes an
`
`25
`
`imagein units of a block, and includessplitter 102, subtractor 104, transformer
`
`106, quantizer 108, entropy encoder 110,
`
`inverse quantizer 112,
`
`inverse
`
`transformer 114, adder 116, block memory 118, loop filter 120, frame memory
`
`18
`
`
`
`122, intra predictor 124, inter predictor 126, and prediction controller 128.
`
`Encoder 100 is implemented as, for example, a generic processor and memory.
`
`In this case, when a software program stored in the memoryis executed by the
`
`processor, the processor functions as splitter 102, subtractor 104, transformer
`
`106, quantizer 108, entropy encoder 110,
`
`inverse quantizer 112,
`
`inverse
`
`transformer 114, adder 116, loop filter 120, intra predictor 124, inter predictor
`
`126, and prediction controller 128. Alternatively, encoder 100 may be
`
`implemented as one or more dedicated electronic circuits corresponding to
`
`splitter 102, subtractor 104, transformer 106, quantizer 108, entropy encoder
`
`10
`
`110, inverse quantizer 112, inverse transformer 114, adder 116, loop filter 120,
`
`intra predictor 124, inter predictor 126, and prediction controller 128.
`
`Hereinafter, an overall flow of processes performed by encoder 100 is
`
`described, and then each of constituent elements included in encoder 100 will
`
`be described.
`
`15
`
`[Overall Flow of Encoding Process]
`
`FIG. 2 is a flow chart indicating one example of an overall encoding
`
`process performed by encoder 100.
`
`First, splitter 102 of encoder 100 splits each of pictures included in an
`
`input image whichis a video into a plurality of blocks having a fixedsize (e.g.,
`
`20
`
`128x128 pixels) (Step Sa_1). Splitter 102 then selects a splitting pattern for
`
`the fixed-size block (also referred to as a block shape) (Step Sa_2).
`
`In other
`
`words, splitter 102 further splits the fixed-size block into a plurality of blocks
`
`which form the selected splitting pattern. Encoder 100 performs, for each of
`
`the plurality of blocks, Steps Sa_3 to Sa_9 for the block (that is a current block
`
`25
`
`to be encoded).
`
`In other words, a prediction processor which includesall or part of intra
`
`predictor 124, inter predictor 126, and prediction controller 128 generates a
`
`19
`
`
`
`prediction signal (also referred to as a prediction block) of the current block to
`
`be encoded (also referred to as a current block) (Step Sa_3).
`
`Next, subtractor 104 generates a difference between the current block
`
`and a prediction block as a prediction residual (also referred to as a difference
`
`block) (Step Sa_4).
`
`Next, transformer 106 transforms the difference block and quantizer 108
`
`quantizes the result,
`
`to generate a plurality of quantized coefficients (Step
`
`Sa_5).
`
`It is to be noted that the block having the plurality of quantized
`
`coefficients is also referred to as a coefficient block.
`
`10
`
`Next, entropy encoder 110 enco
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