www.uspto.gov
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and TrademarkOffice
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`17/095,019
`
`11/11/2020
`
`Junji HIRASE
`
`083710-3167
`
`8285
`
`McDermott Will and Emery LLP
`The McDermott Building
`500 North Capitol Street, N.W.
`Washington, DC 20001
`
`CHIU, WESLEY JASON
`
`2698
`
`10/17/2022
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`Thetime period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`
`mweipdocket@mwe.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`
`
`Disposition of Claims*
`1-8,10,13-14 and 16-22 is/are pending in the application.
`)
`Claim(s)
`5a) Of the above claim(s) 5-7,10,13-14 and 17-19 is/are withdrawn from consideration.
`[) Claim(s)__ is/are allowed.
`Claim(s) 1-4,8,16 and 20-22 is/are rejected.
`S)
`) © Claim(s)____is/are objected to.
`C] Claim(s
`are subjectto restriction and/or election requirement
`)
`S)
`“If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http:/Awww.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`) )
`
`Application Papers
`10) The specification is objected to by the Examiner.
`11)() The drawing(s) filedon__ is/are: a)C) accepted or b)C) objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).
`
`Priority under 35 U.S.C. § 119
`12)[4) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).
`Certified copies:
`cc) None ofthe:
`b)L) Some**
`a)¥) All
`1.4) Certified copies of the priority documents have been received.
`2.1) Certified copies of the priority documents have beenreceived in Application No.
`3.2.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`* See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1)
`
`Notice of References Cited (PTO-892)
`
`2) (J Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`
`3)
`
`(LJ Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`4) (J Other:
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20221004
`
`Application No.
`Applicant(s)
`17/095,019
`HIRASE etal.
`
`Office Action Summary Art Unit|AIA (FITF) StatusExaminer
`WESLEYJ CHIU
`2698
`Yes
`
`
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORY PERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensions of time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`1) Responsive to communication(s) filed on 08/02/2022.
`C} A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`
`2a)() This action is FINAL. 2b)¥)This action is non-final.
`3)02 An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
`4)\0) Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 2
`
`DETAILED ACTION
`
`Notice of Pre-AlA or AIA Status
`
`The present application, filed on or after March 16, 2013, is being examined
`
`under the first inventor to file provisions of the AIA.
`
`Continued Examination Under 37 CFR 1.114
`
`A requestfor continued examination under 37 CFR 1.114, including the fee set
`
`forth in 37 CFR 1.17(e), wasfiled in this application after final rejection. Since this
`
`application is eligible for continued examination under 37 CFR 1.114, and the fee set
`
`forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action
`
`has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on
`
`08/02/2022 has been entered.
`
`Priority
`
`Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which
`
`papers have been placedof recordin the file.
`
`Claim Amendments
`
`Acknowledgment of receiving amendments to the claims, which were received by
`
`the Office on 08/02/2022.
`
`Response to Arguments
`
`Applicant’s arguments with respect to claims 1-4, 8, 16 and 20-22 have been
`
`considered but are moot because the arguments do not apply to the same combination
`
`or interpretation of references being used in the current rejection. Applicant’s
`
`arguments are directed solely to the claimed invention as amended 08/02/2022, which
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 3
`
`has been rejected under new ground of rejection necessitated by amendment. See
`
`rejection below for full detail.
`
`Claim Rejections - 35 USC § 103
`
`In the event the determination of the status of the application as subject to AIA 35
`
`U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103)is incorrect, any
`
`correction of the statutory basis for the rejection will not be considered a new ground of
`
`rejection if the prior art relied upon, and the rationale supporting the rejection, would be
`
`the same under either status.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all
`
`obviousnessrejections set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed
`invention is not identically disclosed as set forth in section 102, if the differences between the
`claimed invention and the prior art are such that the claimed invention as a whole would have
`been obvious before the effective filing date of the claimed invention to a person having
`ordinary skill in the art to which the claimed invention pertains. Patentability shall not be
`negated by the manner in which the invention was made.
`
`Claim 1-3, 8, 16 and 20-22 is/are rejected under 35 U.S.C. 103 as being
`
`unpatentable over Tamaki et al. (US 2015/0115339 A1)
`
`in view of Ohkawa (US
`
`2005/0151175 A1).
`
`Regarding claim 1, Tamaki et al. (hereafter referred as Tamaki) teaches an
`
`imaging device (Tamaki, Figs. 6 and 11) comprising:
`
`pixels (Tamaki, Fig. 6) each including a photoelectric converter (Tamaki, Fig. 6,
`
`photoelectric conversion element 24) including a pixel electrode (Tamaki, Fig. 8A, lower
`
`electrode 9), a counter electrode facing the pixel electrode (Tamaki, Fig. 8A, transparent
`
`electrode 11), and a photoelectric conversion film (Tamaki, Fig. 8A, photoelectric
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 4
`
`conversion film 10) between the counter electrode and the pixel electrode, the
`
`photoelectric conversion film converting light into a charge (Tamaki, Paragraph 0039),
`
`a first transistor (Tamaki, Figs. 6 and 7, reset transistor 22), having a first source,
`
`a first drain, and a first gate, one of the first source and the first drain being connected
`
`to the pixel electrode (Tamaki, Fig. 7, Reset transistor 22 has a drain, source and gate.
`
`The source is connectedto the pixel electrode.),
`
`a second transistor (Tamaki, Figs. 6 and 7, addresstransistor 23) having a
`
`second source, a second drain, and a second gate, one of the second source and the
`
`second drain being connectedto the other of the first source andthe first drain without
`
`transistor intervention (Tamaki, Fig. 7, address transistor 23 has a drain, source and
`
`gate. The source of addresstransistor 23 is connected to the drain of reset transistor
`
`22.), and
`
`a third transistor (Tamaki, Figs. 6 and 7, amplifier transistor 21) having a third
`
`source, a third drain and a third gate, the third gate being connectedto the pixel
`
`electrode not through either the third source or the third drain and not through the first
`
`transistor (Tamaki, Figs. 6 and 7, amplifier transistor 21 has a drain, source and gate.
`
`The gate of amplifier transistor 21 is connected pixel electrode.).
`
`However, Tamaki does notexplicitly state the first transistor having a first gate
`
`insulating film, and the first gate on the first gate insulating film, the second transistor a
`
`second gate insulating film, and the second gate on the second gate insulating film, and
`
`does not teach an effective thickness of the second gate insulting film is smaller than an
`
`effective thicknessofthe first gate insulting film.
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 5
`
`In reference to Ohkawa, Ohkawateachesa first transistor (Ohkawa,Figs. 4 and
`
`6, reset transistor 32) havingafirst gate insulating film (Ohkawa,Fig. 6, reset transistor
`
`32, gate dielectrics 60A), and the first gate on the first gate insulating film (Ohkawa,
`
`Figs. 5 and 6, Figure 6 showsthe gate on the gate insulating film.),
`
`a second transistor (Ohkawa,Figs. 4 and 6, selection transistor 34) a second
`
`gate insulating film (Ohkawa, Fig. 6, selection transistor 34, gate dielectrics 60B), and
`
`the second gate on the secondgate insulating film (Ohkawa, Figs. 5 and 6, Figure 6
`
`showsthe gate on the gate insulating film.), and
`
`an effective thickness of the second gate insulting film is smaller than an effective
`
`thicknessof the first gate insulting film (Ohkawa, Paragraph 0058).
`
`These arts are analogous since they are both related to imaging devices.
`
`Therefore, it would have been obvious to one of ordinary skill in the art before the
`
`effectivefiling date of the claimed invention (AIA) to modify the invention of Tamaki with
`
`the gate insulating film thicknesses as seen in Ohkawato allow the voltage of a reset
`
`signal to be set at a high level without increasing the gate leaking current (Ohkawa,
`
`Paragraph 0023).
`
`Regarding claim 2, the combination of Tamaki and Ohkawateachesthe imaging
`
`device according to Claim 1 (see claim 1 analysis), wherein the effective thicknessof
`
`the second gate insulating film is 80%or less of the effective thicknessof the first gate
`
`insulating film (Ohkawa, Paragraph 0070, A thick gate dielectrics (60A) may be madeof
`
`silicon oxide of a thickness of 6nm or more. A thin gate dielectrics (60B) madeofsilicon
`
`oxide of a thickness of 2.5nm.).
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 6
`
`Regarding claim 3, the combination of Tamaki and Ohkawateachesthe imaging
`
`device according to Claim 2 (see claim 2 analysis), wherein the effective thicknessof
`
`the second gate insulating film is 50%or less of the effective thickness ofthe first gate
`
`insulating film (Ohkawa, Paragraph 0070, gate dielectrics 60A madeofsilicon oxide of a
`
`thickness of 6nm or more and gate dielectrics 60B made ofsilicon oxide of a thickness
`
`of 2.5nm).
`
`Regarding claim 8, the combination of Tamaki and Ohkawateachesthe imaging
`
`device according to Claim 1 (see claim 1 analysis). However, the combination of Tamaki
`
`and Ohkawa doesnot teach a camera system comprising: the imaging device; a lens
`
`optical system that focuses light onto the imaging device; and a camera signal
`
`processor that processes a signal output from the imaging device.
`
`In further reference to Ohkawa, Ohkawa teaches a camera system (Ohkawa,Fig.
`
`18, Paragraph 0143) comprising:
`
`an imaging device;
`
`a lens optical system that focuses light onto the imaging device (Ohkawa,Fig.
`
`18, Paragraph 0144); and
`
`a camera signal processor that processes a signal output from the imaging
`
`device (Ohkawa,Fig. 18, Paragraph 0143).
`
`These arts are analogous since they are both related to imaging devices.
`
`Therefore, it would have been obvious to one of ordinary skill in the art before the
`
`effective filing date of the claimed invention (AIA) to modify the combination of Tamaki
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 7
`
`and Ohkawa with the lens and signal processor as seen in Ohkawato allow an image to
`
`be focused on the imaging device and to process a signal from the imaging device to
`
`produce and image.
`
`Regarding claim 16, the combination of Tamaki and Ohkawateachesthe
`
`imaging device according to Claim 1 (see claim 1 analysis), wherein the first transistor
`
`and the second transistor share an impurity region in a semiconductor substrate
`
`(Tamaki, Fig. 7, The impurity region is considered to be the drain of the first transistor
`
`and the source of the second transistor. The impurity region is interpreted as being
`
`sharedbythe first transistor and the second transistor).
`
`Regarding claim 20, the combination of Tamaki and Ohkawa teaches the
`
`imaging device according to Claim 1 (see claim 1 analysis), wherein the third transistor
`
`is different from the first transistor and the second transistor (Ohkawa,Figs. 6-7, The
`
`transistors are different transistors.).
`
`Regarding claim 21, the combination of Tamaki and Ohkawateachesthe
`
`imaging device according to Claim 1 (see claim 1 analysis), wherein the third gate is
`
`connected to the pixel electrode without transistor intervention (Tamaki, Figs. 6 and 7).
`
`Regarding claim 22, Tamakiet al. (hereafter referred as Tamaki) teaches an
`
`imaging device (Tamaki, Figs. 6 and 11) comprising:
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 8
`
`pixels (Tamaki, Fig. 6) each including a photoelectric converter (Tamaki, Fig. 6,
`
`photoelectric conversion element 24) including a pixel electrode (Tamaki, Fig. 8A, lower
`
`electrode 9), a counter electrode facing the pixel electrode (Tamaki, Fig. 8A, transparent
`
`electrode 11), and a photoelectric conversion film (Tamaki, Fig. 8A, photoelectric
`
`conversion film 10) between the counter electrode and the pixel electrode, the
`
`photoelectric conversion film converting light into a charge (Tamaki, Paragraph 0039),
`
`a first transistor (Tamaki, Figs. 6 and 7, reset transistor 22), having a first source,
`
`a first drain, and a first gate, one of the first source and the first drain being connected
`
`to the pixel electrode (Tamaki, Fig. 7, Reset transistor 22 has a drain, source and gate.
`
`The source is connectedto the pixel electrode.),
`
`a second transistor (Tamaki, Figs. 6 and 7, addresstransistor 23) having a
`
`second source, a second drain, and a second gate, one of the second source and the
`
`second drain being connectedto the other of the first source andthe first drain without
`
`transistor intervention (Tamaki, Fig. 7, address transistor 23 has a drain, source and
`
`gate. The source of addresstransistor 23 is connected to the drain of reset transistor
`
`22.), and
`
`a third transistor (Tamaki, Figs. 6 and 7, amplifier transistor 21) having a third
`
`source, a third drain and a third gate, the third gate being connectedto the pixel
`
`electrode not through either the third source or the third drain, third gate being
`
`connected to the pixel electrode without transistor intervention (Tamaki, Figs. 6 and 7,
`
`amplifier transistor 21 has a drain, source and gate. The gate of amplifier transistor 21 is
`
`connected pixel electrode.).
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 9
`
`However, Tamaki does notexplicitly state the first transistor having a first gate
`
`insulating film, and the first gate on the first gate insulating film, the second transistor a
`
`second gate insulating film, and the second gate on the second gate insulating film, and
`
`does not teach an effective thickness of the second gate insulting film is smaller than an
`
`effective thicknessofthe first gate insulting film.
`
`In reference to Ohkawa, Ohkawateachesa first transistor (Ohkawa,Figs. 4 and
`
`6, reset transistor 32) havingafirst gate insulating film (Ohkawa,Fig. 6, reset transistor
`
`32, gate dielectrics 60A), and the first gate on the first gate insulating film (Ohkawa,
`
`Figs. 5 and 6, Figure 6 showsthe gate on the gate insulating film.),
`
`a second transistor (Ohkawa,Figs. 4 and 6, selection transistor 34) a second
`
`gate insulating film (Ohkawa, Fig. 6, selection transistor 34, gate dielectrics 60B), and
`
`the second gate on the secondgate insulating film (Ohkawa, Figs. 5 and 6, Figure 6
`
`showsthe gate on the gate insulating film.), and
`
`an effective thickness of the second gate insulting film is smaller than an effective
`
`thicknessof the first gate insulting film (Ohkawa, Paragraph 0058).
`
`These arts are analogous since they are both related to imaging devices.
`
`Therefore, it would have been obvious to one of ordinary skill in the art before the
`
`effectivefiling date of the claimed invention (AIA) to modify the invention of Tamaki with
`
`the gate insulating film thicknesses as seen in Ohkawato allow the voltage of a reset
`
`signal to be set at a high level without increasing the gate leaking current (Ohkawa,
`
`Paragraph 0023).
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 10
`
`Claim 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over
`
`Tamakiet al. (US 2015/0115339 A1) in view of Ohkawa (US 2005/0151175 A1) in
`
`further view of Wei et al. (US 2016/0211293 A1).
`
`Regarding claim 4, the combination of Tamaki and Ohkawateachesthe imaging
`
`device according to Claim 3 (see claim 3 analysis). However, the combination of Tamaki
`
`and Ohkawa doesnot teach wherein the effective thickness of the second gate
`
`insulating film is 30%or less of the effective thicknessof the first gate insulating film.
`
`In reference to Wei et al. (hereafter referred as Wei), Wei teaches wherein the
`
`effective thickness of a gate insulating film of a transistor may be between about 5
`
`Angstroms to about 150 Angstroms (Wei, Paragraph 0023, 5 Angstroms to about 150
`
`Angstroms is .5nm to 15nm. Further, Paragraph 0026 states the gate insulating film
`
`thickness may be usedfor the select and resettransistors.).
`
`These arts are analogous since theyare all related to imaging devices.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the
`
`invention was made to modify the combination of Tamaki and Ohkawawith the gate
`
`insulating film range as seen in Wei.
`
`"A person of ordinary skill has good reason to pursue the known options
`within his or her technical grasp. If this leads to the anticipated success, it is likely
`the product not of innovation but of ordinary skill and common sense" KSR
`International Co. v. Teleflex Inc., 550 U.S. _, 82 USPQ2d 1385 (2007).
`
`It would have been obvious to a person of ordinary skill, when pursuing the
`
`known options within his or her technical grasp (See KSR International Co. v. Teleflex
`
`Inc., 550 U.S. _, 82 USPQ2d 1385 (2007)), to have modified the combination of Tamaki
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 11
`
`and Ohkawawith the upper gate insulating film thickness range (150 Angstroms
`
`(15nm)) of the transistor as seen in Wei since it is a known thickness range for a
`
`transistor and would provide similar and expected results as a gate insulating film. That
`
`is, Ohkawadisclosesthe thickness may be 6nm or more but doesnot disclose an upper
`
`limit. Wei explicitly discloses an upper limit for a range of knownthicknessfor the gate
`
`insulating film. Further, the limitation “wherein the effective thickness of the second gate
`
`insulating film is 30%or less of the effective thicknessof the first gate insulating film”
`
`would be met in a case where the second gate insulating film is 2.5nm and the first gate
`
`insulating film is 8.4nm or more.
`
`Claim 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over
`
`Tamakiet al. (US 2015/0115339 A1) in view of Ohkawa (US 2005/0151175 A1) in
`
`further view of lwabuchi et al. (US 2007/0091190 A1).
`
`Alternatively, regarding claim 16, the combination of Tamaki and Ohkawa
`
`teaches the imaging device according to Claim 1 (see claim 1 analysis). However, the
`
`combination of Tamaki and Ohkawa does not teach wherein the first transistor and the
`
`second transistor share an impurity region in a semiconductor substrate.
`
`In reference to lwabuchi et al. (hereafter referred as lwabuchi), lwabuchi teaches
`
`wherein the first transistor (lwabuchi, Figs. 3-4, reset transistor 53) and the second
`
`transistor (lwabuchi, Figs. 3-4, selection transistor 52) share an impurity region in a
`
`semiconductor substrate (lwabuchi, Fig. 4, Paragraph 0061).
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 12
`
`These arts are analogous since theyare all related to imaging devices.
`
`Therefore, it would have been obvious to one of ordinary skill in the art at the time the
`
`invention was made to modify the combination of Tamaki and Ohkawawith teaching of
`
`sharing an impurity region as seen in lwabuchi.
`
`"A person of ordinary skill has good reason to pursue the known options
`within his or her technical grasp. If this leads to the anticipated success, it is likely
`the product notof innovation but of ordinary skill and common sense" KSR
`International Co. v. Teleflex Inc., 550 U.S. _, 82 USPQ2d 1385 (2007).
`
`It would have been obvious to a person of ordinary skill, when pursuing the
`
`known options within his or her technical grasp (See KSR International Co. v. Teleflex
`
`Inc., 550 U.S. _, 82 USPQ2d 1385 (2007)), to have modified the combination of Tamaki
`
`and Ohkawawith teaching of sharing an impurity region as seen in lwabuchi sinceit is a
`
`known method of directly connecting two transistors and would remove the need of a
`
`separate connection/wiring to connect he transistors.
`
`Conclusion
`
`Any inquiry concerning this communication or earlier communications from the
`
`examiner should be directed to WESLEY JASON CHIU whose telephone number is
`
`(571)270-1312. The examiner can normally be reached Mon-Fri: 8am-4pm.
`
`Examiner interviews are available via telephone, in-person, and video
`
`conferencing using a USPTO supplied web-basedcollaboration tool. To schedule an
`
`interview, applicant is encouraged to use the USPTO AutomatedInterview Request
`
`(AIR) at http:/Awww.uspto.gov/interviewpractice.
`
`

`

`Application/Control Number: 17/095,019
`Art Unit: 2698
`
`Page 13
`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner's
`
`supervisor, Twyler Haskins can be reached on (571) 272-7406. The fax phone number
`
`for the organization where this application or proceeding is assignedis 571-273-8300.
`
`Information regarding the status of published or unpublished applications may be
`
`obtained from Patent Center. Unpublished application information in Patent Center is
`
`available to registered users. To file and manage patent submissions in Patent Center,
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`visit: https://patentcenter.uspto.gov. Visit https:/Awww.uspto.gov/patents/apply/patent-
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`center for more information about Patent Center and
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`https:/Awww.uspto.gov/patents/docx for information aboutfiling in DOCX format. For
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`additional questions, contact the Electronic Business Center (EBC) at 866-217-9197
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`Representative, call 800-786-9199 (IN USA OR CANADA)or 571-272-1000.
`
`/WESLEYJ CHIU/
`Examiner, Art Unit 2698
`
`/TWYLER L HASKINS/
`Supervisory Patent Examiner, Art Unit 2698
`
`